A stacked packaging structure and its manufacturing method
A technology of packaging structure and process method, which is applied in the direction of semiconductor/solid-state device parts, semiconductor devices, electrical components, etc., and can solve problems such as large tolerances of solder ball volume and height, reduced solder ball spacing, and unbalanced contact stress. , to achieve the effect of improving yield rate, satisfying fine pitch, and not easy to defect
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[0049] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.
[0050] Such as figure 2 As shown, a package-on-package structure in this embodiment includes a first package body 1 and a second package body 2, the first package body 1 includes a first substrate 14 and a first chip 16, and the first package body 1 includes a first chip 16. A substrate 14 includes a first circuit pattern 15 and a first copper column 11, a first chip 16 is arranged on the first circuit pattern 15, and the first chip 16 is electrically connected to the first circuit pattern 15, the A first molding compound 17 is arranged above the first substrate 14, and an opening 18 is arranged on the upper surface of the first molding compound 17 corresponding to the position of the first copper pillar 11, and the top of the first copper pillar 11 is exposed to the first molding compound. In the opening 18 on the upper surface of the first...
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