a hysteretic comparator
A hysteresis comparator and inverter technology, applied in the field of hysteresis comparators, can solve problems such as poor output characteristics, high power consumption, unfavorable circuit integration, etc., and achieve good output characteristics and reduce power consumption
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Embodiment 1
[0030] figure 1 The structure diagram of the hysteresis comparator provided for the first embodiment. Such as figure 1 As shown, the hysteresis comparator includes a two-stage operational amplifier 1 for providing gain; positive feedback circuit 2 for obtaining the corresponding threshold voltage according to its setting parameters; enable control circuit 3 for controlling by outputting an enable signal The hysteresis comparator is in working state or static;
[0031] The two-stage operational amplifier 1 includes: a differential amplifier circuit, a third NMOS and a current source;
[0032] The positive feedback circuit 2 includes: a first inverter, a second inverter, a fifth NMOS, and a sixth NMOS;
[0033] Wherein, the gate of the sixth NMOS is connected to the differential amplifier circuit, the drain of the sixth NMOS is connected to the gate of the differential amplifier circuit and the third NMOS, the source of the sixth NMOS is connected to the drain of the fifth NM...
Embodiment 2
[0038] figure 2The circuit diagram of the hysteresis comparator provided for the second embodiment. image 3 provided for the present invention figure 2 The equivalent circuit diagram. Figure 4 A schematic diagram of the voltage transfer characteristics of the hysteresis comparator provided by the present invention. Such as figure 2 As shown, the differential amplifier circuit of the two-stage operational amplifier 1 specifically includes: a first PMOS, a second PMOS, a first NMOS and a second NMOS;
[0039] Among them, the gate of the first PMOS is connected to the input voltage terminal V in Connection, the source of the first PMOS and the source of the second PMOS are connected to the current source, the drain of the first PMOS is connected to the drain of the first NMOS and the gate of the first NMOS, and the gate of the second PMOS is connected to the reference The voltage terminal is connected, the drain of the second PMOS is connected with the drain of the seco...
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