28 results about "Hysteresis comparator" patented technology

The application discloses a kind of based on SM2 algorithm and SM4 algorithm's password processing method and system, belong to computer information security technical field, comprising: the enhanced task control block including service index number and data amount is constructed;Based on historical performance data calculation processing coefficient, utilize double threshold hysteresis comparator decision serial or parallel mode, avoid mode frequent switching;Parallel mode is through load balancing weight function for subtask allocation IP core;Hardware synchronization control unit maintains three index tables being processing, blocking and having been processed, realizes the automatic blocking and wake-up of associated job package, and with service index number as address accesses key and intermediate state;Adopt interrupt aggregation and double buffering batch processing result;Based on sliding window adaptive calibration double threshold and dynamically adjusting weight coefficient.The application effectively reduces interrupt overhead, eliminates scheduling ping-pong effect, realizes hardware level job synchronization, improves load balancing and image encryption structure fidelity.

This invention discloses an over-temperature protection circuit for power supply ICs, belonging to the field of integrated circuit design. It includes a reference current source module, a PTAT current source module, a temperature decision module, a temperature sensing module, and a hysteresis comparator module. This circuit employs a temperature-segmented triggering mode and hysteresis comparator technology. While ensuring a wide operating temperature range, it significantly reduces the high power consumption caused by the indiscriminate operation of traditional over-temperature protection across the entire temperature range. Furthermore, it effectively avoids false triggering faults near the over-temperature protection point caused by process fluctuations or noise, and solves the problem of repeated switching of power transistors due to external disturbances. Therefore, it is suitable for use in power chips requiring integrated over-temperature protection. The over-temperature protection circuit of this invention has the advantages of simple structure, low production cost, and small area, and combines low power consumption with high reliability, thus improving the lifespan and stability of power supply ICs.

The application provides a voltage holding device and an electronic device using the same. The voltage holding device uses a hysteresis voltage of a hysteresis comparator to update the charge of a capacitor efficiently and pursue lower power consumption. On the other hand, because the advanced voltage holding circuit pursues lower power consumption, the refresh time must be designed to be longer, which results in the inability to perform a large amount of yield tests. However, the technical solution provided by the application can cooperate with related application circuits to greatly shorten the test time, increase the testability and reliability of the voltage holding device.

The application belongs to the technical field of power electronics and new energy control, and particularly relates to a hybrid power supply system power control method for a three-port converter. The method comprises the following steps: S1, collecting a state of charge signal SOC of the battery unit in real time, and inputting the state of charge signal SOC into a low-power hysteresis comparator and a high-power hysteresis comparator respectively; S2, dynamically adjusting a battery charging power reference value and a bus voltage reference correction term according to a low-power interval identifier, a high-power interval identifier and a normal power interval identifier, and injecting the adjusted battery charging power reference value and the bus voltage reference correction term into a control loop in real time; and S3, constructing a first sub-control loop, a second sub-control loop and a third sub-control loop running in parallel in the control loop.

This disclosure relates to glitch suppression for FSK demodulation. According to an embodiment, a glitch suppression circuit includes a first-stage averaging circuit with programmable length, a second-stage averaging circuit, and a hysteresis comparator. The first stage uses a FIFO buffer to implement recursive shifting and averaging to process a binary input signal. The second stage provides moving average filtering. The hysteresis comparator uses a programmable threshold set based on the peak signal value to generate a clean output signal. This circuit removes glitches from the input signal of the frequency shift keying (FSK) demodulator while maintaining signal integrity at high bit rates. The programmable parameters allow for optimization based on desired glitch characteristics and system requirements.

This invention discloses a variable-step automatic gain control method based on an adaptive window, applicable to signal automatic gain control in data acquisition systems. The method preprocesses the input signal and samples it using an ADC to obtain a digital signal, which is then fed into an FPGA. A zero-crossing detection method based on a hysteresis comparator is used to estimate the signal frequency, and the window length is calculated based on this adaptive amplitude matching. The average signal amplitude within the window is then calculated and compared with a preset automatic gain threshold range. The gain step value is dynamically matched and updated to the variable gain amplifier to complete closed-loop control. Finally, the gain value is used to perform an amplitude inverse calculation to restore the signal. This invention improves the detection accuracy and dynamic response speed of the system over a wide bandwidth and dynamic range, eliminates the hardware resource consumption of floating-point division operations, and accurately outputs a distortion-free original proportional signal stream.

This invention discloses a fast-response current-limiting protection circuit for an RS485 driver, comprising a current sampling unit and a fast-response hysteresis comparator. The current sampling unit receives signals, and its output is connected to the fast-response hysteresis comparator. The fast-response hysteresis comparator receives the output voltage of the current sampling unit, amplifies and compares the received voltage, and outputs a control signal based on the comparison result. This invention, by setting the current sampling unit to sample the current of the power transistor, and connecting the output signal of the current sampling unit to the voltage conversion unit of the fast-response hysteresis comparator, can quickly and effectively respond to changes in the gate voltage signal of the power transistor, enabling the output control signal to quickly control the current flowing through the protected power transistor. This overcomes the problem in existing RS485 driver circuits where, in high-speed applications, the overcurrent protection response is untimely when a short circuit occurs on the A / B bus, causing excessive current and chip burnout during short circuits.

A semiconductor device includes a secured circuit, an electromagnetic interference (EMI) sensor over a surface of the secured circuit, and a sensing circuit. The EMI sensor is configured to receive a reference voltage and the EMI sensor includes at least one of electric (E) field sensor or a magnetic (H) field sensor. The sensing circuit includes a hysteresis comparator and a voltage level comparator. The hysteresis comparator has a first input coupled to a first node of the EMI sensor via a low pass filter, a second input directly connected to the first node, and an output configured to provide an output indicative an EMI attack. An antenna portion of the EMI sensor includes the first node and is coupled between inputs of the voltage level comparator, in which the voltage comparator is configured to provide an output indicative of a physical tampering with the antenna portion.

This invention discloses an adaptive anti-interference demodulation circuit, receiver, and demodulation method, belonging to the field of wireless communication technology. The invention uses a full-wave rectifier module to rectify intermediate frequency or baseband signals, and then transmits the output signal via a splitter. A noise detection module extracts the noise intensity of the rectified signal and outputs a quantized signal. A linkage control module synchronously controls an adaptive DC bias module and an adaptive hysteresis comparator module based on this noise signal, dynamically lowering the decision reference voltage to offset the DC rise caused by noise rectification, while simultaneously adaptively widening the hysteresis window to suppress interference jitter. This invention achieves synchronous and adaptive adjustment of DC bias and hysteresis width without manual calibration, can be implemented entirely in hardware, and features low power consumption, high robustness, and strong environmental adaptability, making it suitable for various wireless communication receiving scenarios requiring low power consumption and anti-interference performance.

The application discloses a LOS state detection circuit for an SFP optical module, which comprises an input inversion module, a signal conditioning and pulse expansion module and a threshold comparison and decision module connected in sequence. The input inversion module comprises a receiving original port link state indication signal, which is used for logical inversion of the original signal and enhancement of driving capacity. The signal conditioning module converts the data pulse stream output by a PHY chip into a smooth direct current voltage by using peak holding and RC expansion technology. The threshold comparison module intelligently judges whether the voltage represents valid signal activity through a hysteresis comparator, and finally outputs a hardware LOS signal which strictly conforms to the SFP MSA standard and is highly stable. The application realizes reliable optical signal loss detection in a full hardware mode, solves the problems of unstable output and easy misjudgment of a traditional scheme, and has the advantages of low cost, small area, fast response and high reliability, and is particularly suitable for integrated SFP optical module design.

The application belongs to but is not limited to the technical field of power electronics, and particularly relates to a SiC power semiconductor module adaptive active drive and a control method thereof. A system acquires a drain current signal of a power device (SiC MOSFET) in real time through a current sampling circuit, and converts the drain current signal into a voltage signal Vmode. The Vmode is input into a control signal generation circuit. The control signal generation circuit is based on a multi-path hysteresis comparator, and classifies and identifies the current through preset multi-stage threshold values, and outputs corresponding control signals according to the identified overload grades. The control signals are respectively sent to a drive circuit (used for switching off negative voltage from-5V to-2V under strong overload conditions) and a parallel capacitor dynamic switching circuit (used for sequentially inputting gate-source parallel capacitors with different capacitance values according to the overload degree). Finally, through the synergistic effect of the switching off negative voltage adjustment and the parallel capacitor switching, the switching off overvoltage and gate cross talk under strong overload conditions are effectively inhibited.

The application discloses a current limiting value self-adaptive adjusting circuit for a Buck / Boost converter, which comprises a hysteresis comparator, a slope generation circuit, a sample-and-hold circuit, a V / I conversion circuit and a dynamic hysteresis current output circuit; the slope generation circuit outputs corresponding slope voltages in a Buck mode or a Boost mode; the sample-and-hold circuit collects and holds the maximum value of the slope voltages; the V / I conversion circuit obtains the maximum slope current through a clamping resistor; the dynamic hysteresis current output circuit outputs a dynamic hysteresis current according to the control signal of a power tube in the Buck mode or the Boost mode and the maximum slope current; and the hysteresis comparator outputs an adaptively adjusted current limiting value according to the current limiting threshold value in the Buck mode or the Boost mode, the sampling voltage and the dynamic hysteresis current. The application can adaptively adjust the current limiting value of the Buck / Boost converter according to the size of slope compensation.

The application discloses a capacitor charging type drive circuit and method for inhibiting oscillation of a hysteresis comparator, and is characterized in that the circuit comprises a drive unit and a charging time control unit; wherein the drive unit drives a switch tube M1 to be turned on or turned off based on an output voltage of the hysteresis comparator, so as to control charging and discharging states of the capacitor and charging states of a load in a later stage; and the charging time control unit is connected with the drive unit and is used for controlling the switch tube M1 to keep a turned-on state in a delay time when the output level of the hysteresis comparator is low. The circuit has simple structure, few components, and is less limited in parameter selection of a preset delay time and a reference voltage, and has good circuit output effect.

This invention provides a hybrid solid-state transformer and its power distribution method for normal power optimization, belonging to the field of power electronic transformer technology. It includes a power frequency transformer, a three-stage dual-parallel converter, a power sampling circuit, a hysteresis comparator circuit, and a combined controller. One end of the power frequency transformer is connected to the high-voltage grid, and the other end is connected to the AC load. The three-stage dual-parallel converter is connected in parallel with the power frequency transformer. The power sampling circuit acquires the voltage and current of the AC load and outputs an analog voltage signal. The hysteresis comparator circuit evaluates the operating conditions of the analog voltage signal and outputs a binary status signal. The combined controller acquires the binary status signal and the fault signal of the three-stage dual-parallel converter, and controls the operating state of the power frequency transformer and the three-stage dual-parallel converter. This invention solves the problems of low operating efficiency and uneven power distribution of existing transformers under light load, heavy load, and fault conditions.

The utility model relates to the technical field of response control, specifically touch button response circuit that can prevent false triggering, it contains the main touch capacitor for realizing touch response, the main touch capacitor one end ground, the other end is connected to the power supply anode through resistance five, the main touch capacitor this end still is connected with main amplifier, and is connected on its negative input, the circuit is equipped with the noise reduction capacitor, the noise reduction capacitor rear is connected with shielding drive, shielding drive and main amplifier's output end are connected to the rear differential amplifier, and the differential amplifier rear end is connected with hysteresis comparator, hysteresis comparator output signal, simple structure, and the sensitivity of touch can be adjusted through resistance, and the system flexibility is good, through synchronous electrode potential and differential amplification, filter out noise and electromagnetic interference, ensure that touch signal is clear and accurate, guarantee that the main touch capacitor can accurately detect finger contact, prevent false triggering caused by dust or static electricity etc.

The application is suitable for the technical field of power electronic converter control, and provides a Vienna rectifier modulation method and system based on midpoint current difference observation, which comprises the following steps: calculating the midpoint current difference observation value reflecting the instantaneous imbalance trend of the midpoint potential in real time; determining whether the system is in a steady state or a transient state mode through a hysteresis comparator according to the observation value; in the steady state, adopting a full-cycle continuous clamping DPWM strategy covering zero points in combination with PI control to realize low-loss and low-distortion operation; in the transient state, immediately switching to an SVPWM strategy in combination with high-gain P control to strongly suppress the midpoint potential fluctuation. The application eliminates the voltage feedback lag through current feedforward observation, and adaptively integrates the advantages of the two modulation strategies, solves the problem that the efficiency, harmonics and dynamic performance of the Vienna rectifier are difficult to be considered, and significantly improves the overall performance of the system.

The embodiment of the present application provides a kind of low-power power supply monitoring circuit.The application is applied to integrated circuit design field, including: band-gap reference module, resistance voltage division module, switch module, hysteresis comparator, logic timer and refresh timer;The band-gap reference module is used to generate reference voltage;The resistance voltage division module is used to sample power supply voltage and obtain power supply voltage division;The hysteresis comparator is used to compare the reference voltage and the power supply voltage division, and according to the comparison result, the corresponding digital signal is output;The logic timer generates reset signal according to the output signal of the hysteresis comparator;The refresh timer is used to generate control signal to control the working state of the switch module.The present application reduces current consumption, and realizes low-power power supply monitoring.

This invention provides a dual-bus solar array power redundancy expansion device, comprising solar array SAS1, solar array SAS2, a first shunt module, a first push-pull circuit, a redundancy expansion control system, a first voltage divider circuit, a second shunt module, a second push-pull circuit, a second voltage divider circuit, a hysteresis comparator, a fourth transistor, a first operational amplifier, and a second operational amplifier. One end of solar array SAS1 is grounded, and the other end of solar array SAS1 is connected to the first shunt module, the redundancy expansion control system, the first voltage divider circuit, and the +42V power bus. One end of solar array SAS2 is grounded, and the other end of solar array SAS2 is connected to the second shunt module, the redundancy expansion control system, the second voltage divider circuit, and the +28V power bus. The beneficial effect of this invention is that it establishes a power interconnection path between two bus systems, improving the reliability of the satellite power system.

The utility model discloses a kind of vehicle-mounted equipment power supply low-voltage protection and spare battery switching control circuit, including first power conversion circuit, second power conversion circuit, hysteresis comparator circuit and spare battery switch circuit.First power conversion circuit is filtered to vehicle-mounted power supply, DC-DC conversion is carried out, and multiple protection circuits are set;Second power conversion circuit reduces voltage output stable voltage to vehicle-mounted power supply;Hysteresis comparator circuit real-time monitoring vehicle-mounted power supply voltage;Spare battery switch circuit switches to spare battery power supply when low voltage.It can real-time monitoring vehicle-mounted power supply voltage, when voltage is lower than set threshold, cut off vehicle-mounted power supply and rear-end equipment connection, prevent automobile battery overdischarge, while automatically switched to spare battery power supply, guarantee vehicle-mounted equipment continuous operation.In addition, through hysteresis voltage comparator design, avoid circuit frequently switching, improve system stability and reliability, ensure the continuity of automobile intelligent function.

This invention relates to a single-wire power supply system, method, and smart screen with adaptive chopping time adjustment, comprising the following modules: a zero-crossing detection unit, connected between the live wire input and output, for detecting the zero-crossing point of the mains signal and outputting a zero-crossing signal; the zero-crossing detection unit includes a hysteresis comparator circuit for shaping the mains signal to output a stable zero-crossing signal; a main control unit, connected to the output of the zero-crossing detection unit, for acquiring the arrival time t1 of the zero-crossing signal cycle by cycle, and adaptively adjusting the chopping duration within the current mains cycle according to the arrival time t1 to generate a chopping control signal; and a switching unit, connected between the live wire input and output and controlled by the main control unit to be on or off periodically driven by the chopping control signal to control the power extraction process.

The present disclosure provides a PWM control-based PTC heater control system and a car, and belongs to the technical field of PTC heating, wherein the PTC heater control system comprises: a PWM control signal receiving end capable of receiving a PWM control signal input from outside the system; a PTC driving circuit capable of outputting a corresponding PTC driving signal according to the received PWM control signal; a hysteresis comparator circuit arranged between the PWM control signal receiving end and the PTC driving circuit, wherein the inverting input end of the hysteresis comparator circuit is connected with the PWM control signal receiving end, and the output end of the hysteresis comparator circuit is connected with the PTC driving circuit. The technical scheme of the present disclosure can effectively reduce the size of the PTC heater control system and reduce the cost.

According to an embodiment, a glitch rejection circuit includes a first stage averaging circuit with programmable length, a second stage averaging circuit, and a hysteresis comparator. The first stage implements a recursive moving sum average using a FIFO buffer to process a binary input signal. The second stage provides moving average filtering. The hysteresis comparator uses programmable thresholds set based on peak signal values to generate a clean output signal. The circuit removes glitches from frequency-shift keying (FSK) demodulator input signals while maintaining signal integrity at high bitrates. The programmable parameters allow optimization based on expected glitch characteristics and system requirements.

The application provides a low-power power-on reset circuit and a power-on reset method. The circuit comprises a bias current generating circuit, a current hysteresis comparator circuit and an anti-interference delay circuit. The bias current generating circuit is connected to the hysteresis comparator circuit, the hysteresis comparator circuit is connected to the anti-interference circuit, and the hysteresis comparator circuit is connected to the first bias current output end and the second bias current output end in the bias current generating circuit. During the chip power-on process, the required reset signal is output by controlling the generation sequence of the upper branch current and the lower branch current of the current hysteresis comparator circuit in the power-on reset circuit and judging the current size change between them. Meanwhile, the function of input voltage hysteresis detection is realized by controlling the lower branch current of the current hysteresis comparator circuit through the output feedback signal. Most of the components used in the circuit are CMOS devices, and the circuit has the characteristics of strong anti-interference ability, low cost, low power consumption and high reliability.

This invention discloses a hysteresis control circuit based on a multiphase power supply. The hysteresis control circuit includes multiple DC-DC converter units connected in parallel. The output of the hysteresis comparator module is connected to the DC-DC converter via a frequency control module. The frequency control module compares the switching frequency of the switching control signal output by the hysteresis comparator module with a reference switching frequency. When the switching frequency is greater than the reference switching frequency, the frequency control module sends a first adjustment command to the control terminal of the hysteresis comparator module to increase the width of the hysteresis window of the hysteresis comparator module, thereby reducing the actual switching frequency of the switching control signal finally output by the hysteresis comparator module to the DC-DC converter. In this way, by adjusting the switching frequency of the switching control signal output by the hysteresis comparator module in real time through the frequency control module, it is ensured that each DC-DC converter unit can accurately stabilize its switching frequency at the set value when conditions such as process, voltage, and temperature change, thus improving the stability of the circuit.

This invention relates to a DC drive protection circuit and its design method for a mid-infrared laser, belonging to the field of power supply drive protection technology. The core of this invention lies in achieving dual hardware protection for both laser voltage and current through three main modules. Key technical points include: a voltage protection module composed of comparator U1, operational amplifier U3, etc., integrating a voltage differential, hysteresis comparator, and adjustable potentiometer to monitor the voltage difference across the laser in real time and automatically cut off the power supply in case of overvoltage; a current protection module composed of comparator U5, etc., which limits the amplitude of the microcontroller's D / A signal through a hysteresis comparator and potentiometer to precisely control the current range; and a voltage-controlled constant current source module composed of operational amplifier U6, etc., generating a constant current to drive the laser. The voltage protection allows for flexible switching of the power supply based on the actual voltage difference, avoiding frequent false triggering; the current protection threshold is adjustable via a potentiometer to adapt to different laser specifications; and the constant current source ensures stable output. This improves the reliability and lifespan of the mid-infrared laser.

This utility model discloses a multi-source intelligent charging circuit, relating to the field of electronic circuits. It includes an intelligent detection module, a transformer module, and a load. The intelligent detection module comprises a main power supply detection circuit, a backup power supply detection circuit, and an emergency power supply detection circuit, all coupled via MOSFETs. The main power supply detection circuit uses a hysteresis comparator to enhance anti-interference capability. The backup power supply detection circuit has a switch K1 for manual priority adjustment. The emergency power supply detection circuit activates when both the main and backup power supplies are abnormal. Priority interlocking is achieved between the circuits via PMOS transistors and diodes, and an RC circuit buffers current surges. This circuit ensures power supply continuity and stability by presetting three power supply priorities and coupling them for switching. It allows for one-click priority switching, enhancing industrial versatility. Furthermore, its pure hardware structure is simple and easy to repair, making it suitable for scenarios requiring multi-source power supply. It effectively utilizes clean energy and improves charging reliability.

This invention provides an improved Kalman filter current compensation method for the flexible interaction point of a photovoltaic-storage-DC-flexible system. This method first collects the grid-connected current at the flexible interaction point of the photovoltaic-storage-DC-flexible system. i abc The DC component detection module employs an improved Kalman filter (i.e., an extended Kalman filter based on the state extension method, or EKF). This method introduces the harmonic current signal as process noise into the detection stage, allowing for real-time extraction of the DC component from the grid-connected current. i d Then the reference current and DC component were... i d The differential input hysteresis comparator uses its output PWM signal to control the IGBT switching transistor to output inverter current. This invention can effectively filter out non-characteristic harmonics while filtering out characteristic harmonics, and has the advantages of high detection efficiency, fast response speed, and adaptability to complex power quality environments at flexible interaction points.

The application discloses a kind of digital downsampling decimation filter architecture design methods based on frequency band division.The method first determines the target frequency band of input signal and original sampling frequency, and obtains the frequency pre-estimate of signal by the fast frequency estimation mechanism based on hysteresis comparator;Subsequently, according to the estimated frequency, the full frequency band is divided into multiple independent sub-bands, and the downsampling multiple and enable control signal are dynamically matched;Then, the signal is input into the decimation filter architecture of double-path multi-stage cascade, for the low-frequency resolution and spectrum leakage problem of wideband signal under high-speed sampling, the problem that the group delay of traditional multi-stage cascade filter is too large under high-rate decimation is broken, and high-fidelity downsampling and high-precision frequency domain analysis of wideband signal are realized.