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Semiconductor structures and methods of forming them

A semiconductor, dry etching technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve the problem of poor through-silicon via structure performance, packaging device performance degradation, and device feature size reduction. and other problems, to achieve the effect of performance improvement, reliability improvement, structure and performance stability

Active Publication Date: 2018-08-10
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] However, with the continuous development of semiconductor technology, the device density continues to increase, and the device feature size continues to shrink, which also causes poor performance of the through-silicon via structure, which easily leads to performance degradation or failure of packaged devices.

Method used

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  • Semiconductor structures and methods of forming them
  • Semiconductor structures and methods of forming them
  • Semiconductor structures and methods of forming them

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Embodiment Construction

[0033] As mentioned in the background, the TSV structure has poor morphology and poor electrical performance.

[0034] Please refer to figure 1 and figure 2 , figure 1 and figure 2 is a schematic diagram of a TSV structure according to an embodiment of the present invention, figure 2 yes figure 1 The schematic diagram of the top view structure, figure 1 yes figure 2 A schematic cross-sectional structure along the direction AA', including: a substrate; a device layer 101 located on the surface of the substrate 100, the device layer 101 having electrical interconnection lines 110; an interposer located in the device layer 101 and the substrate 100 A plug structure 102 , the plug structure 102 penetrates through the device layer 101 and the substrate 100 , and the plug structure 102 includes: a conductive plug 120 , and an insulating layer 121 located on a sidewall surface of the conductive plug 120 .

[0035] The process of forming the conductive plug 120 and the subs...

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Abstract

The invention relates to a semiconductor structure and a formation method thereof. The formation method comprises the steps of providing a substrate, wherein the surface of the substrate is provided with a first device layer, forming a first through hole in the first device layer, forming a sacrificial layer at the side wall surface of the first through hole, etching the exposed bottom of the first through hole after the sacrificial layer is formed so as to form a second through hole in the substrate and the first device layer, forming a plug structure in the second through hole, removing the sacrificial layer, and forming a gap between the plug structure and the first device layer. The electrical performance and the reliability of the semiconductor structure are improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the continuous development of semiconductor manufacturing technology, the feature size of semiconductor devices is continuously reduced, and the integration level of chips is getting higher and higher. However, the current two-dimensional packaging structure has been difficult to meet the growing demand for chip integration, so three-dimensional packaging technology has become a key technology to overcome the bottleneck of chip integration. [0003] A three-dimensional stacking technology based on a through-silicon via (TSV) structure is one of the existing three-dimensional packaging technologies, and the three-dimensional stacking technology based on a through-silicon via is one of the main methods for improving chip integration. [0004] The three-dimensional stackin...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/31H01L21/56
Inventor 何其暘
Owner SEMICON MFG INT (SHANGHAI) CORP