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Radar digital signal processing device based on all-solid-state semiconductor memory array

A digital signal processing, memory array technology, applied in electrical digital data processing, instruments, etc., can solve problems such as narrow temperature application range, loose structure, dust-resistant footprint, etc.

Inactive Publication Date: 2016-09-21
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The current commercial high-speed storage devices mainly include automatic tape cabinets and hard disk arrays (Redundant Arrays of Independent Disks, RAID). Tape cabinet storage, when the tape cabinet is stored in the vault, the robotic arm of the robot will move the tape between the storage layer and the tape drive; the tape cabinet storage has an extremely high capacity price ratio, and has ultra-high speed, large capacity It is an ideal choice for high-speed and large-capacity storage in fixed bases. Of course, the disadvantages are also very obvious. The structure of tape cabinet storage is complex, loose in structure, narrow in temperature range, poor in shock resistance, not resistant to dust, and occupies a large area.
[0004] Compared with this, solid-state memory has the advantages of compact structure and strong environmental adaptability. The current commercial solid-state hard disk (SSD) belongs to solid-state memory products; but the current commercial solid-state hard disk (SSD) products have small capacity, low speed, and poor integration. , cannot meet the storage and playback requirements of high-speed real-time signal processors, and the development of special memory based on semiconductor solid-state storage has five technical difficulties: (1) designing a high-density and large-capacity semiconductor memory array controller; (2) in order to extend the memory It is crucial and difficult to control the load balance of all storage semiconductors on the dedicated memory based on semiconductor solid-state storage; (3) In the dedicated memory based on semiconductor solid-state storage, the speed of data storage and reading , and the requirement of data accuracy is particularly important, so it is necessary to ensure error-free high-speed operation through multiple technologies; (4) PCIe control and high-speed data communication with the dedicated memory host based on semiconductor solid-state storage; (5) communication with the chassis The high-speed data interface between other equipment boards (such as AD acquisition boards, signal processing boards, these equipment boards are electrically connected through the VPX bus backplane) is used as data entry and data exit

Method used

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Embodiment Construction

[0024] refer to figure 1 , is a structural schematic diagram of the device of the present invention; all functions contained in a radar digital signal processing device based on an all-solid-state semiconductor memory array of the present invention are respectively implemented in a main control computer and an FPGA, and the described based on an all-solid-state semiconductor memory array A special device for digital signals, including: a high-density all-solid-state semiconductor memory array storage board and a main control computer; the high-density all-solid-state semiconductor memory array storage board includes an FPGA and an all-solid-state semiconductor memory array; the FPGA includes: an embedded soft core Processor, AXI bus, PCIe controller, all-solid-state semiconductor memory array controller and SRIO controller; Described main control computer comprises a bidirectional port, and described embedded soft-core processor comprises a bidirectional port, and described AXI...

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Abstract

The invention discloses a radar digital signal processing device based on an all-solid-state semiconductor memory array. The radar digital signal processing device comprises a SoC chip, an AXI bus, a PCIe controller, an all-solid-state semiconductor memory array controller, a SRIO controller, and a main control computer (PC). The PC obtains a control instruction and radar echo. The PCIe controller receives the control instruction and analyzes the control instruction. The SoC chip receives and executes the analyzed control instruction, and then feeds back operation states to the PC. The all-solid-state semiconductor memory array controller obtains encoded radar echo, and decodes the encoded radar echo to obtain radar echo. The all-solid-state semiconductor memory array controller obtains respective operating state of the all-solid-state semiconductor memory array controller and the array controller, and makes the SoC chip feed the respective operating state of a storage and the storage array controller back to the PC. The SRIO controller obtains the control instruction and the encoded radar echo, and makes the SoC chip analyze and execute the control instruction, and feeds the current SRIO controller operating state back to the PCIe controller.

Description

technical field [0001] The invention belongs to the technical field of all-solid-state memory, and in particular relates to a radar digital signal processing device based on an all-solid-state semiconductor memory array, which is suitable for playing, importing or exporting digital signals in all-solid-state memory. Background technique [0002] High-speed data recording and controllable playback technology is one of the key technologies in many fields at home and abroad, used for detection, investigation, surveillance, equipment testing, field debugging, etc. In engineering, it is usually necessary to record high-speed raw digital signal data streams for later fault diagnosis, scene review, and data archiving; however, the actual engineering application environment often has harsh conditions such as large temperature differences, dust, and strong vibrations. Therefore, strong real-time, large-capacity, high-density, high-reliability digital acquisition and playback equipmen...

Claims

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Application Information

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IPC IPC(8): G06F13/28G06F13/38G06F13/40
CPCG06F13/28G06F13/385G06F13/4022G06F2213/0024
Inventor 苏涛徐杰仲鸣张辉
Owner XIDIAN UNIV
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