Device isolation method for GaN transistors

Abstract

The invention provides a device isolation method for GaN transistors. The method includes the steps that the surface of a GaN wafer is spin-coated with photoresist, a photoresist layer is formed, the surface of the GaN wafer is provided with a device region, and a source and a drain are formed in the device region; the photoresist layer is etched through a photoetching process, the portion, covering the device region, of the photoresist layer is reserved, an isolation region is etched out, and the isolation region is exposed out of the surface of the GaN wafer; fluorine-based plasma is doped into the portion, in the isolation region, of the GaN wafer through an inductive coupling plasma etching machine, and fluorine ions are injected into an epitaxial layer of the GaN wafer; the portion, covering the device region, of the photoresist layer is removed. In this way, fluorine ion injection can be achieved by using a GaN material as a natural mask for fluorine ion injection, and then isolation between the GaN transistors is completed.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a device isolation method for GaN transistors. Background technique [0002] GaN material belongs to the third-generation semiconductor material, which has typical characteristics such as large band gap and high breakdown electric field strength, and is very suitable for making high-frequency and high-power devices. At present, GaN microelectronic devices have been widely used in military communications, radar, electronic countermeasures and other national defense and military fields. With the gradual decline in the cost of GaN wafers and the continuous maturity of GaN manufacturing technology, GaN devices will shine in the civilian field in the future . The future 5G communication may be an important opportunity for GaN electronic devices to be applied on a large scale. [0003] The research on GaN electronic devices has been carried out for more than 20 ye...

AI Technical Summary

Problems solved by technology

[0004] Mesa isolation technology has obvious disadvantages: if the step is too deep, the climbing metal will be easily broken; if the insulation performance of the buffer layer is poor, it will cause leakage; at the same time, the part of the gate metal outside the active area is deposited on GaN On the buffer layer, a large parasitic capacitance will also be introduced to affect the frequency characteristics of the device

[0006] 1. The ion implantation equipment is huge in size, high in price and high in maintenance cost;

[0007] 2. The effect of the ion implantation process mainly depends on the type of ion selected, the implantation energy, and the implantation dose. The implantation is qualitative, and the process can be adjusted poorly.

Images