Low on-resistance lateral double-diffusion metal oxide semiconductor device

An oxide semiconductor and lateral double-diffusion technology, which is applied in semiconductor devices, electrical components, circuits, etc., can solve the problems that LDMOS withstand voltage and on-resistance cannot be optimized, and it is difficult to achieve low on-resistance LDMOS. Low on-resistance, reduced on-resistance, and low on-resistance effects

Active Publication Date: 2016-10-12
SOUTHEAST UNIV
View PDF3 Cites 9 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, studies have shown that when conventional STI is used as the field plate medium in the LDMOS drift region, the linear region current on the LDMOS conductive path is greatly affected by ST

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Low on-resistance lateral double-diffusion metal oxide semiconductor device
  • Low on-resistance lateral double-diffusion metal oxide semiconductor device
  • Low on-resistance lateral double-diffusion metal oxide semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

Example Embodiment

[0023] A low on-resistance lateral double-diffusion metal oxide semiconductor device, comprising: a P-type substrate 1, a high-voltage N-type region 2 is provided above the P-type substrate 1, and an N-type region is provided above the high-voltage N-type region 2 The N-type drift region 3 and the P-type body region are provided with an N-type drain region 6 and a shallow trench isolation region in the N-type drift region 3, and an N-type source region 5 and a P-type region 7 are provided in the P-type body region 4. A gate oxide layer 8 is also provided above the high-voltage N-type region 2, and both ends of the gate oxide layer 8 extend to above the P-type body region 4 and above the first shallow trench isolation region 13, respectively. A polysilicon gate field plate 9 is arranged above 8 and a drain metal contact 10, a source metal contact 11 and a body metal contact 12 are respectively provided on the upper surfaces of the N-type drain region 6, the N-type source region 5...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides a low on-resistance lateral double-diffusion metal oxide semiconductor device which comprises a P-type substrate. A high voltage N-type area is arranged above the P-type substrate. An N-type drift area and a P-type body area are arranged above the high voltage N-type area. An N-type drain area and shallow trench isolation areas are arranged in the N-type drift area. An N-type source area and a P-type area are arranged in the P-type body area. A gate oxide layer is arranged above the high voltage N-type area, and two ends of the gate oxide layer extend to be above the P-type body area and the first shallow trench isolation area. A polysilicon gate field plate is arranged above the gate oxide layer, and metal contact is arranged above the N-type drain area, the N-type source area and the P-type area. The low on-resistance lateral double-diffusion metal oxide semiconductor device is characterized in that the shallow trench isolation area comprises an interval and first and second shallow trench isolation areas in symmetrical arrangement. The two ends in the second shallow trench isolation area retract inward, and the second shallow trench isolation area is shorter than the first shallow trench isolation area. According to the low on-resistance lateral double-diffusion metal oxide semiconductor device, on the basis of nearly no change of breakdown voltage, extremely low conduction resistance can be obtained.

Description

technical field [0001] The invention relates to the field of power semiconductor devices, and relates to a lateral double-diffused metal oxide semiconductor device with low conduction resistance. Background technique [0002] With the rapid development of semiconductor technology and its application fields, the manufacturing process and structure of power semiconductor devices are constantly improving, which promotes the development of power devices in the direction of high performance. [0003] Among power devices, Lateral Double-Diffused MOSFET (LDMOS for short) has the advantages of high withstand voltage, high input impedance and easy integration, so it is widely used in the manufacture of semiconductor integrated circuits. Compared with conventional MOSFETs, LDMOS devices have a low-doped drift region. When a high voltage is applied between the drain and the source, since the drift region has a high resistance, most of the voltage is applied to the drift region, which ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H01L29/78H01L29/06H01L29/10
CPCH01L29/0657H01L29/1008H01L29/7816H01L29/0653H01L29/0692H01L29/4238H01L29/402
Inventor 孙伟锋薛颖叶然陈欣刘斯扬陆生礼时龙兴
Owner SOUTHEAST UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products