Low on-resistance lateral double-diffusion metal oxide semiconductor device

Abstract

The invention provides a low on-resistance lateral double-diffusion metal oxide semiconductor device which comprises a P-type substrate. A high voltage N-type area is arranged above the P-type substrate. An N-type drift area and a P-type body area are arranged above the high voltage N-type area. An N-type drain area and shallow trench isolation areas are arranged in the N-type drift area. An N-type source area and a P-type area are arranged in the P-type body area. A gate oxide layer is arranged above the high voltage N-type area, and two ends of the gate oxide layer extend to be above the P-type body area and the first shallow trench isolation area. A polysilicon gate field plate is arranged above the gate oxide layer, and metal contact is arranged above the N-type drain area, the N-type source area and the P-type area. The low on-resistance lateral double-diffusion metal oxide semiconductor device is characterized in that the shallow trench isolation area comprises an interval and first and second shallow trench isolation areas in symmetrical arrangement. The two ends in the second shallow trench isolation area retract inward, and the second shallow trench isolation area is shorter than the first shallow trench isolation area. According to the low on-resistance lateral double-diffusion metal oxide semiconductor device, on the basis of nearly no change of breakdown voltage, extremely low conduction resistance can be obtained.

Description

technical field [0001] The invention relates to the field of power semiconductor devices, and relates to a lateral double-diffused metal oxide semiconductor device with low conduction resistance. Background technique [0002] With the rapid development of semiconductor technology and its application fields, the manufacturing process and structure of power semiconductor devices are constantly improving, which promotes the development of power devices in the direction of high performance. [0003] Among power devices, Lateral Double-Diffused MOSFET (LDMOS for short) has the advantages of high withstand voltage, high input impedance and easy integration, so it is widely used in the manufacture of semiconductor integrated circuits. Compared with conventional MOSFETs, LDMOS devices have a low-doped drift region. When a high voltage is applied between the drain and the source, since the drift region has a high resistance, most of the voltage is applied to the drift region, which ...

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Problems solved by technology

However, studies have shown that when conventional STI is used as the field plate medium in the LDMOS drift region, the linear region current on the LDMOS conductive path is greatly affected by STI. Due to the limitation of the size of the STI structure, the withstand voltage and on-resistance of LDMOS cannot be achieved. optimization, so it is difficult to achieve low on-resistance LDMOS

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