GPS capture circuit based on optimization parallel code phase search

Abstract

The invention discloses a GPS capture circuit based on optimization parallel code phase search. The GPS capture circuit comprises a down conversion circuit, a down sampling circuit, a fast Fourier transform circuit, a delay circuit, a C / A code generating circuit, an inverse Fourier transform circuit, a coherent integration circuit, a modulus circuit, a non-coherent integration circuit and a threshold decision circuit. In IFFT operation, output data reordering is prevented, and ultimately position bit inversion is simply carried out on the position of the maximum peak-to-average ratio to acquire the received signal C / A code phase. The memory consumption in an IFFT module is saved. According to the invention, the GPS capture circuit can be used to capture any GPS satellite signal; in the case of abundant hardware resources, the capture speed is doubled without changing the frequency search step; the cold start capture time is 1.17 seconds; the hot start capture time is less than 0.5 second; the capture sensitivity can reach -145dBm; and capture can be completed when signals are very weak.

Description

technical field [0001] The invention belongs to the technical field of GPS global satellite positioning, in particular to an optimized parallel code phase search and capture architecture. Background technique [0002] GPS is the abbreviation of Global Positioning System (Global Positioning System), which was proposed by the US Department of Defense in the 1970s. It is an all-weather radio positioning and timing system based on artificial satellites and facing the world. The GPS system is mainly composed of three independent parts: the space constellation part, the ground monitoring part and the user equipment part. The space constellation part initially consisted of 21 working satellites and 3 spare satellites, but currently the number of satellites in normal operation has exceeded 30, and these satellites are distributed in 6 orbits; the ground monitoring part is mainly composed of 1 satellite distributed around the world The main control station (located in Springfield, C...

AI Technical Summary

Problems solved by technology

However, this architecture also has defects: for the case of large frequency offset, there is a loss of signal sensitivity, and the frequency offset loss is the same as sinc(πf d N ch / f s ) is proportional to where N ch is the number of coherent integration (here, the purpose of coherent integration is to smooth the signal to reduce the number of subsequent FFT points), f s is the sampling rate of the signal, f d Represents the Doppler frequency offset; secondly, the frequency domain resolution of FFT will also cause additional sensitivity loss

The disadvantage of this architecture is that the number of FFT points must be a power of 2, which limits the sampling rate of the signal, otherwise additional processing (such as an average sampling circuit) is required to meet the limitation of the number of FFT points; in addition, sometimes in order to reduce the FFT The number of points (if the signal sampling rate is relatively high), the average sampling circuit is also required to complete the downsampling

The architecture can simultaneously search N B frequency points, but this architecture needs to consume a large number of FFT units

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