Semiconductor structure and forming method thereof

Abstract

The invention provides a semiconductor structure and a forming method thereof. The forming method of the semiconductor structure comprises the steps that a semiconductor substrate is provided; a mask layer and a sacrificial material layer located on the surface of the mask layer are sequentially formed on the surface of the semiconductor substrate; the sacrificial material layer is etched to form a plurality of discrete sacrificial layers; side walls are formed on the side wall surfaces of the sacrificial layers; the sacrificial layers are removed; and supplement side walls are formed on the side wall surfaces of the side walls. By the method, improvement of the performance of the formed semiconductor structure is facilitated.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the continuous development of semiconductor process technology, the process node is gradually reduced, and the gate-last (gate-last) process has been widely used to obtain an ideal threshold voltage and improve device performance. However, when the feature size (CD, Critical Dimension) of the device is further reduced, even if the gate-last process is adopted, the structure of the conventional MOS field effect transistor can no longer meet the requirements for device performance, and the fin field effect transistor (Fin FET) as Substitution of conventional devices has received extensive attention. [0003] As the minimum line width and spacing of integrated circuit designs continue to shrink, fin field effect transistor (FinFET) fin widths are getting smaller and smaller. When the ...

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Problems solved by technology

[0011] Figure 5 It is a schematic diagram of the structure in an ideal state after removing the sacrificial layer 31 in the prior art, but in an actual process, removing the sacrificial layer 31 will often cause damage to the sidewall 33 or damage to the oxide layer 20, resulting in the underside of the sidewall 33. The thickness of the mask layer is not uniform (please refer to Image 6 ), affecting the quality of the final formed fin

Therefore, the performance of the semiconductor structure formed by the prior art still needs to be further improved.

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