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Forming method of semiconductor structure

A semiconductor and pattern layer technology, applied in the field of semiconductor structure formation, can solve problems such as poor performance of storage devices and performance degradation of storage devices, and achieve the effects of improving performance, improving electrical performance, and good verticality

Active Publication Date: 2016-12-07
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, this formation method often leads to degradation of memory device performance
[0005] Therefore, the performance of the memory device formed by the existing method for forming the semiconductor structure is poor

Method used

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  • Forming method of semiconductor structure

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Experimental program
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Effect test

Embodiment Construction

[0021] The method for forming the semiconductor structure has the disadvantage that the performance of the formed semiconductor structure is poor.

[0022] Combining with a method of forming a semiconductor structure, the reasons for the poor performance of the formed semiconductor structure are analyzed:

[0023] The method for forming the semiconductor structure is as Figure 1 to Figure 4 shown.

[0024] Please refer to figure 1 , providing a substrate 100, the substrate 100 includes a peripheral area I and a storage area II; a floating gate layer 110 is formed on the peripheral area I and a part of the storage area II substrate; the floating gate layer 110 and the storage area II A control gate layer 120 is formed on the substrate 100 .

[0025] Please refer to figure 2 , figure 2 In memory area II is figure 1 Based on the cross-sectional view along the dotted line 1-2, a patterned photoresist 121 is formed in the storage region II, and the floating gate layer 110...

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PUM

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Abstract

The invention provides a forming method of a semiconductor structure. The method comprises the steps as follows: a substrate is provided, wherein the substrate comprises a memory region and a peripheral region; a grid layer is formed on substrates in the memory region and the peripheral region; a first pattern layer is formed on the substrate in the peripheral region and one part of grid layer in the memory region; the grid layer in the memory region is etched by employing the first pattern layer as a mask and an isolation groove is formed in the grid layer of the memory region; the first pattern layer is removed; a second pattern layer is formed on the grid layer in the memory region; the grid layer on the substrate in the peripheral region is removed by employing the second pattern layer as the mask; the second pattern layer is removed; the grid layer on the substrate in the peripheral region is removed and then a peripheral device structure is formed in the peripheral region; and a plug connected with the grid layer on the side wall of the isolation groove is formed. By the forming method, connection of the formed plug and the grid layer on the side wall of the isolation groove can be improved, so that the electrical property between the plug and the grid layer is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a semiconductor structure. Background technique [0002] With the development of information technology, the amount of stored information has increased dramatically. The increase in the amount of stored information has promoted the rapid development of memory. [0003] Flash memory (Flash memory), also known as flash memory, has become a mainstream memory of non-volatile memory. The main feature of flash memory is that it can keep stored information for a long time without power on; and it has the advantages of high integration, fast access speed, easy erasing and rewriting, etc. It has been widely used in the field of microcomputer and automatic control. Therefore, how to improve the performance of the flash memory has become an important issue. [0004] Storage devices are generally formed on the same wafer as peripheral logic device...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8247H10B41/35
CPCH10B69/00
Inventor 沈思杰
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP