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Protective via cap for improved interconnect performance

A technology of protective cover and interconnection, which is applied in semiconductor/solid-state device components, discharge tubes, semiconductor devices, etc., can solve the problems of destructive electromigration, sharp increase of line resistance and resistance-capacitance delay, etc., and achieve shortening Queue time, the effect of reducing device oxidation or corrosion

Active Publication Date: 2017-02-15
APPLIED MATERIALS INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, security features including interconnects and vias can cause dramatic increases in line resistance and resistive-capacitive delays throughout the circuit structure
Additionally, electromigration can become increasingly destructive as feature sizes shrink

Method used

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  • Protective via cap for improved interconnect performance
  • Protective via cap for improved interconnect performance
  • Protective via cap for improved interconnect performance

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Embodiment Construction

[0023] The present technology includes systems, structures and methods for improving interconnect and via performance and the overall electrical performance of integrated circuit ("IC") devices. As semiconductor feature sizes shrink, many issues can arise, including electrical issues. Many IC devices use copper or tungsten as the via metal and interconnect metal for both within and between device layers. For example, the use of copper as a via metal and interconnect metal often includes the use of barrier layers in the trenches and vias to limit copper diffusion into surrounding layers, which can cause short circuits or device failure. In addition, as the dimensions of device features and interconnect trenches and vias shrink, the interconnect metal may suffer from incomplete filling due to the high aspect ratio within the trenches.

[0024] Conventional techniques often address this degradation with liners to improve gap filling. However, the more barrier and liner material...

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Abstract

Exemplary methods of forming a semiconductor structure may include etching a via through a semiconductor structure to expose a first circuit layer interconnect metal. The methods may include forming a layer of a material overlying the exposed first circuit layer interconnect metal. The methods may also include forming a barrier layer within the via having minimal coverage along the bottom of the via. The methods may additionally include forming a second circuit layer interconnect metal overlying the layer of material.

Description

[0001] Cross References to Related Applications [0002] This application claims priority to US Nonprovisional Patent Application No. 14 / 291,466, filed May 30, 2014, entitled "PROTECTIVE VIA CAP FOR IMPROVED INTERCONNECT PERFORMANCE." The entire content of this application is hereby incorporated by reference for all purposes. technical field [0003] The technology relates to semiconductor systems, processes and equipment. More specifically, the technology relates to systems, methods and structures for improving interconnect structures to reduce electromigration. Background technique [0004] An integrated circuit may contain more than one million microelectronic field effect transistors formed on a substrate and working together to perform various functions within the circuit. Reliable production of sub-half micron features and smaller is one of the key technologies for the next generation of very large scale integration ("VLSI") and very large scale integration ("ULSI") ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/48
CPCH01L23/53266H01L23/53295H01L2924/0002H01J37/32091H01L21/76846H01L23/5226H01L23/53238H01L2924/00H01L21/02068H01L21/30604H01L21/3065H01L21/76807H01L21/76877H01L23/528
Inventor M·奈克P·F·马S·D·耐马尼
Owner APPLIED MATERIALS INC