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SOI (Silicon On Insulator) substrate and preparation method thereof

A substrate and silicon substrate technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems affecting device performance and achieve the effects of simplifying the process flow, eliminating defects, and improving performance and reliability

Active Publication Date: 2017-04-26
ZING SEMICON CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, there are defects in the SOI substrate prepared in the prior art, which affect the performance of the device

Method used

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  • SOI (Silicon On Insulator) substrate and preparation method thereof
  • SOI (Silicon On Insulator) substrate and preparation method thereof
  • SOI (Silicon On Insulator) substrate and preparation method thereof

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Embodiment Construction

[0029] The SOI substrate of the present invention and its preparation method will be described in more detail below in conjunction with schematic diagrams, wherein a preferred embodiment of the present invention is represented, and it should be understood that those skilled in the art can modify the present invention described here and still implement the present invention beneficial effect. Therefore, the following description should be understood as the broad knowledge of those skilled in the art, but not as a limitation of the present invention.

[0030] The core idea of ​​the present invention is to provide an SOI substrate and its preparation method. The deuterium ions are implanted into the first substrate. Due to the large mass of the deuterium ions, the deuterium ions still exist after the thermal annealing process. In a substrate, deuterium ions exist in the upper silicon layer of the formed SOI substrate. In the device formed on the SOI substrate of the present inve...

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Abstract

The invention provides a SOI (Silicon On Insulator) substrate and a preparation method thereof. The method comprises steps: a first substrate is provided, and a first dielectric layer is formed on the first substrate; deuterium ion injection is carried out on the first substrate, and a deuterium doping layer is formed in the first substrate with a first predetermined depth; a second substrate is provided, a second dielectric layer is formed on the second substrate, and the first dielectric layer and the second dielectric layer are bonded; thermal annealing is carried out, and microbubbles are formed in the deuterium doping layer; and the first substrate is cut from the deuterium doping layer, and the SOI substrate is formed. deuterium ions exist in the upper-layer silicon of the SOI substrate; when a gate oxide layer or an interface is formed in a subsequent device, deuterium can be diffused and combined with a dangling bond at the interface, and a stable structure can be formed; the deuterium ions can eliminate defects in the device, and penetration of hot carriers can be avoided; hydrogen annealing to eliminate defects is not needed, the device preparation process is simplified, and the performance and the reliability of the device are improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to an SOI substrate and a preparation method thereof. Background technique [0002] A silicon-on-insulator (Silicon On Insulator, SOI) substrate is a substrate used in the manufacture of integrated circuits. Compared with bulk silicon substrates currently widely used, SOI substrates have many advantages: integrated circuits made of SOI substrates have small parasitic capacitance, high integration density, small short-channel effects, fast speed, and can also realize The dielectric isolation of components in integrated circuits eliminates the parasitic latch-up effect in bulk silicon integrated circuits. [0003] Currently, there are mainly three mature SOI substrate formation processes, specifically the Separation by Implanted Oxygen (SIMOX) process, the silicon wafer bonding process, and the SmartCut process. However, there are defects in the SOI substrate pre...

Claims

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Application Information

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IPC IPC(8): H01L21/762
CPCH01L21/76254H01L21/76259H01L21/26513H01L21/02123H01L21/324H01L21/7624H01L21/76297H01L21/76801H01L21/3003H01L29/0649H01L29/32
Inventor 肖德元张汝京
Owner ZING SEMICON CORP
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