A multi-size chip cutting process
A cutting process, multi-dimensional technology, applied in the field of microelectronics, can solve the problems of poor economy, complex process, slow cutting speed, etc., to achieve the effect of improving RF conversion efficiency, simple process, and short distance to ground
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[0030] like Figure 1-7 As shown, in this embodiment, the process is described through a combination of illustrations and text, and the names of the components involved are marked in the drawings for easy understanding. The specific operations are as follows:
[0031] A multi-size chip cutting process, comprising the following steps:
[0032] A. Apply photolithography on the back of the wafer, and double-sided overlay the pattern on the front of the chip, remove the backside photolithography corresponding to the chip dicing line, and expose the silicon material of the chip substrate, such as image 3 shown.
[0033] B. Using deep reactive ion etching technology, but the substrate silicon material, the silicon substrate material can be completely etched away to the purification layer, and a part of the silicon substrate material can also be retained, such as Figure 4 shown.
[0034] C. After completing the deep reactive ion etching wafer, use wet or dry deglue process to r...
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