Memory management method, memory control circuit unit and memory storage device

Abstract

The invention relates to a memory management method, a memory control circuit unit and a memory storage device. The method includes the steps that when the memory storage device is operated in a first mode, at least one piece of first address information of at least one first logic-entity mapping table is loaded into a first buffer zone from a reproducible nonvolatile memory module, wherein the first address information has a first data size; when the memory storage device is operated in a second mode, at least one piece of second address information of at least one second logic-entity mapping table is loaded into the first buffer zone from the reproducible nonvolatile memory module, wherein the second address information has a second data size, and the first data size is smaller than the second data size. The space of a buffer memory is effectively distributed and utilized, the speed of data access of the memory storage device is better increased, and the efficiency of data access of the memory storage device is better improved.

Description

technical field [0001] The present invention relates to a memory management method, and in particular to a memory management method for a rewritable non-volatile memory module, a memory control circuit unit and a memory storage device. Background technique [0002] The rapid growth of digital cameras, mobile phones, and MP3 players has led to a rapid increase in consumer demand for storage media. Since rewritable non-volatile memory (rewritable non-volatile memory) has the characteristics of data non-volatility, power saving, small size, no mechanical structure, fast read and write speed, etc., it is most suitable for portable electronic products, such as notebook computers . A solid state drive is a memory storage device that uses a flash memory module as a storage medium. Therefore, the flash memory industry has become a very popular part of the electronics industry in recent years. [0003] In order for the host system to successfully access the data of the rewritable ...

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Problems solved by technology

However, in this case, if the host system performs an overall test operation of randomly reading data on the memory storage device instead, since the range of logical addresses corresponding to the data randomly read in the overall test operation is compared with The logical addresses corresponding to the data in a small range come from a wide range of places. Therefore, the address information of all logic-entity mapping tables corresponding to the above-mentioned small-range data and the buffer memory space reserved for the logic-entity mapping table will not be able to satisfy random The address information of the logic-entity mapping table and the space required for the logic-entity mapping table in the overall test operation of reading data

[0005] If it is desired to simultaneously achieve the above two kinds of data access (or test) operations without loading the address information and the logic-entity mapping table corresponding to the respective logic-entity mapping tables, it is necessary to reserve in the buffer memory Enough to store the address information of the logic-entity mapping table and the space of the logic-entity mapping table corresponding to the data with the capacity of the memory storage device; However, this situation will cause the space of the buffer memory to be in some cases (for example, a small range Data access operations) cannot be fully utilized, resulting in a waste of buffer memory space

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