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LVDS receiving circuit supporting ddr data format

A receiving circuit and data format technology, applied in the direction of electrical digital data processing, instruments, etc., can solve the problems of unable to transmit DDR data format, unable to provide protection, complex timing of LVDS receiving circuit, etc., to improve data transmission rate and realize failure The effect of protection

Active Publication Date: 2019-12-06
58TH RES INST OF CETC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At this time, the timing of the correct sampling of the LVDS receiving circuit is more complicated
In addition, for DDR transmission of LVDS, the transmission of DDR data format is not yet possible, nor can it provide protection in invalid state

Method used

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  • LVDS receiving circuit supporting ddr data format
  • LVDS receiving circuit supporting ddr data format
  • LVDS receiving circuit supporting ddr data format

Examples

Experimental program
Comparison scheme
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Embodiment Construction

[0038] The present invention will be further described below in conjunction with specific drawings and embodiments.

[0039] Such as figure 1 , figure 2 and image 3 Shown: in order to support the data input of DDR format, improve data transmission rate, the present invention comprises the LVDS interface receiving circuit 1 that is used to receive several road LVDS differential data and the DDR format conversion circuit 3 that is connected with the circuit 1 that described LVDS interface receives The LVDS interface receiving circuit 1 can convert the LVDS differential data receiving each channel into corresponding CMOS signals, and the DDR format conversion circuit 3 can convert the circuit 1 received by the LVDS interface to convert the CMOS signals of each channel into two SDR signals.

[0040] Specifically, the LVDS interface receiving circuit 1 includes several parallel LVDS receivers 2, the LVDS interface receiving circuit 1 receives one LVDS differential data through ...

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PUM

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Abstract

The invention relates to a circuit, in particular to an LVDS (Low Voltage Differential Signal) receiving circuit capable of supporting a DDR (Double Data Rate) data format, and belongs to the technical field of integrated circuits. According to the technical scheme provided by the invention, the LVDS receiving circuit capable of supporting the DDR data format comprises an LVDS interface receiving circuit used for receiving multiple paths of LVDS differential data, and a DDR format conversion circuit connected with the LVDS interface receiving circuit; the LVDS interface receiving circuit can convert each path of received LVDS differential data into a corresponding CMOS (Complementary Metal Oxide Semiconductor) signal; the DDR format conversion circuit can convert each path of CMOS signals which are received by the LVDS interface and are obtained by circuit conversion into two paths of SDR (Single Date Rate) signals. The LVDS receiving circuit is compact in structure, failure protection can be realized, the LVDS receiving circuit can work in a wide input common-mode voltage range and supports to input the data of a DDR format, a data transmission rate is improved, and the LVDS receiving circuit is safe and reliable.

Description

technical field [0001] The invention relates to a circuit, in particular to an LVDS receiving circuit supporting DDR data format, and belongs to the technical field of integrated circuits. Background technique [0002] With the improvement of computer performance and the progress of large-scale integrated circuit industry, people have higher and higher requirements for network performance, which makes data transmission develop in the direction of low cost, low bit error rate and high speed transmission. Due to the influence of clock jitter, skew, synchronization between queues and crosstalk noise, etc., the further improvement of parallel transmission rate has encountered insurmountable obstacles, and serial transmission has gradually become the main transmission mode of high-speed data transmission systems in deep submicron. However, conventional CMOS (Complementary Metal Oxide Semiconductor) and TTL (Transistor-Transistor Logic) are difficult to achieve signal transmission...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/38G06F13/40
CPCG06F13/385G06F13/4072G06F2213/3852
Inventor 陈富涛牛洪军吴叶陈钟鹏季惠才吴海宏
Owner 58TH RES INST OF CETC
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