Fabrication method of GaN high electron mobility transistor (HEMT) device

Abstract

The invention relates to the technical field of semiconductor manufacturing, in particular to a fabrication method of a GaN high electron mobility transistor (HEMT) device. The fabrication method comprises the following steps of S1, forming a P-type GaN grid region and a P-type GaN hole injector region on a GaN HEMT structure; S2, preparing source-drain ohmic contact; S3, forming an active isolation region on the GaN HEMT structure; S4, opening the hole injector region by a photoetching and developing mode, depositing metal Ni, and performing stripping; S5, oxidizing the metal Ni to form an NiO hole injector; S6, opening the grid region by the photoetching and developing mode, and preparing a grid on the gird region; and S7, opening the grid, a source, a rain and the hole injector region by the photoetching and developing mode, communicating the drain with the NiO hole injector, and respectively thickening the grid, the source and the drain. According to the fabrication method, the hole injector is additionally arranged between the grid and the drain, holes are injected to a surface of an AlGaN barrier layer to compensate electrons which are trapped, so that depletion of channel two-dimensional electrical gas is reduced, and the current collapse resistant capability of the device is improved.

Description

technical field [0001] The invention belongs to the technical field of semiconductor manufacturing, and in particular relates to a method for manufacturing a GaN HEMT device. Background technique [0002] Because of its wide band gap, GaN materials make GaN HEMT devices based on them have high breakdown voltage, high current density and low on-resistance, and are the core devices of modern power transmission systems. The primary condition for GaN HEMT as a power electronic device is the enhanced working mode. The hotspot in the scientific research and industry circles is the GaN HEMT device with a P-type GaN gate. The specific method is to insert a The P-type GaN layer raises the triangular potential well at the lower AlGaN / GaN heterojunction interface to above the Fermi level through the PN built-in electric field, thereby forming an enhanced channel. With the deepening of research, the P-type GaN gate technology has also encountered a bottleneck. In the above process tec...

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However, the above method is difficult to realize in the process, and it is not obvious to the

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