A FPGA-based multi-board array parallel decryption device and method

Abstract

The invention discloses an FPGA based multi-board-card array parallel decoding device and method. The device, adopting a CPCI communication framework, comprises a main control card used for communicating with the exterior and carrying out management scheduling control for a decoded card, more than six decoding cards used for decoding fast operation and reporting an operation result and a back plate used for the decoding cards and the main control card to finish high-speed interconnection of the board cards; the parallel decoding device adopts an ARM processor to take charge of state management inside each board card and configuration uploading of am FPGA firmware, and transmits the state information to a PC (Principal Computer) through an internal network path; and the PC controls and schedules based on related states. The decoding device makes a full use of the high-speed serdes interface of the FPGA, so that the data transmission bandwidth is improved and the data transmission time is reduced; and each board card is internally provided with a high-speed big-capacity memory DDR3 unit, so that high-speed storage and access of data is guaranteed.

Description

technical field [0001] The invention relates to the technical field of decryption processing, in particular to an FPGA-based multi-board array parallel decryption device and method thereof. Background technique [0002] After years of development, most encryption algorithms have become mature and stable, and there are fewer and fewer exploitable algorithm loopholes. Therefore, the pure brute force cracking method that does not require any algorithm loopholes to crack passwords has become a general decryption method. In the field of decryption processing, it is an important content to decipher related encrypted data, especially for national defense and public security. [0003] Most of the existing cracking platforms use a single computer or a computer cluster to crack, because the CPU (Central Processing Unit) on the computer only has the ability of serial calculation, which greatly limits the efficiency and performance of cracking. In addition, if a computer cluster is us...

AI Technical Summary

Problems solved by technology

[0003] Most of the existing cracking platforms use a single computer or a computer cluster to crack, because the CPU (Central Processing Unit) on the computer only has the ability of serial calculation, which greatly limits the efficiency and performance of cracking

In addition, if the computer cluster is used to increase the cracking performance, it will also encounter problems in power consumption and heat generation.

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