Power Semiconductor Devices with Charge Balancing Design

A semiconductor and body technology, applied in the field of drift region structure, which can solve the problems of high on-state loss, poor diode reverse recovery softness, poor electrical performance tradeoff, etc.

Active Publication Date: 2021-04-02
INFINEON TECH AG
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, these approaches generally lead to poorer electrical performance tradeoffs, such as poorer diode reverse recovery softness and higher on-state losses and thus poorer V ce,sat (collector-emitter saturation voltage) and E off (turn off loss)

Method used

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  • Power Semiconductor Devices with Charge Balancing Design
  • Power Semiconductor Devices with Charge Balancing Design
  • Power Semiconductor Devices with Charge Balancing Design

Examples

Experimental program
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Embodiment Construction

[0027]Embodiments disclosed herein include power semiconductor devices. According to one embodiment, the power semiconductor device is an IGBT with a vertical trench gate electrode structure. The power semiconductor device includes a doped superjunction region arranged at the bottom of the gate trench and extending vertically into the drift region of the device. The doped superjunction region comprises three doped pillars or stripes of alternating conductivity type (ie p-n-p or n-p-n). The doped superjunction region extends vertically no more than half of the drift region.

[0028] Various methods for forming power semiconductor devices are disclosed. Embodiments of these methods include providing a lightly doped first semiconductor layer of the first conductivity type. A doped superjunction region is formed in the first semiconductor layer. Various different techniques are disclosed for forming doped superjunction regions in the first semiconductor layer. One technique i...

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Abstract

Embodiments of the present disclosure relate to power semiconductor devices with charge balancing designs. A semiconductor body is formed having vertically spaced apart first and second surfaces. A gate trench extending vertically from the first surface to the second surface of the semiconductor body is formed. A gate electrode and a gate dielectric are formed in the gate trench. A gate dielectric electrically insulates the gate electrode from adjacent semiconductor material. A doped super junction region extending vertically from the bottom of the gate trench to the second surface of the semiconductor body is formed. The doped super junction region includes a first doped pillar region, a second doped pillar region and a third doped pillar region extending vertically from the first surface of the first semiconductor layer and directly adjoining each other. The second stud region is intermediate the first stud region and the third stud region in the lateral direction and has a conductivity type opposite to that of the first and third stud regions.

Description

technical field [0001] The present application relates to power semiconductor devices, and more particularly to drift region structures that enhance the electrical performance of power semiconductor devices. Background technique [0002] Power semiconductor devices, particularly field-effect controlled switching devices such as metal-oxide-semiconductor field-effect transistors (MOSFETs) or insulated-gate bipolar transistors (IGBTs), have been used in a variety of applications, including but not limited to as power supplies and switches in power converters, electric vehicles, air conditioners and even stereo systems. Especially with regard to power devices capable of switching high currents and / or operating at higher voltages, low on-state resistance Ron, high breakdown voltage U bd and / or high robustness. A power MOSFET generally includes a drain region, a drift region adjacent to the drain region, and a source region, each region having a first conductivity type, and the...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/331H01L23/552H01L29/06H01L29/739
CPCH01L23/552H01L29/0634H01L29/0684H01L29/66348H01L29/7397H01L29/7398H01L29/7813H01L21/0465H01L29/1608H01L29/66068H01L29/66734H01L29/0878H01L29/0638H01L29/1095
Inventor 谢佩珊H-J·舒尔策
Owner INFINEON TECH AG
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