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Super-junction device

A super junction device and gate structure technology, applied in the field of semiconductor integrated circuits, can solve the problems of reducing EAS capability, EAS burnout, reducing parasitic triode base current, etc.

Inactive Publication Date: 2018-01-16
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Since the parasitic triode will be turned on when the base current of the parasitic triode is large, thereby reducing the EAS capability, so in order to improve the EAS capability of the device, it is usually necessary to guide the avalanche current path away from the base region of the parasitic triode, thereby reducing the base of the parasitic triode. area current; in addition, the existing super-junction devices are very prone to EAS burnout at the corner of the terminal or near the terminal, which is a big bottleneck for improving the overall EAS capability

Method used

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Embodiment Construction

[0034] The technical solution of the embodiment of the present invention is obtained on the basis of analyzing the existing technical problems. Before introducing the technical solution of the embodiment of the present invention in detail, the structure of the existing super-junction device is described as follows, as follows figure 1 Shown is a schematic diagram of the layout structure of the existing super junction device; figure 2 yes figure 1 Schematic diagram of the cross-sectional structure of the device at the position of the AA line in the center; the middle region of the existing superjunction device is the charge flow region, the terminal protection region is formed on the peripheral side of the charge flow region, and the transition region is located between the terminal protection region and the charge flow region. between the flow areas, figure 2 In , the left side of the dotted line BB is the charge flow area, the area between the dotted line BB and CC is the ...

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Abstract

The invention discloses a super-junction device. A transition region comprises a P-type ring and a polysilicon bus, the polysilicon bus is connected with a polysilicon gate in a charge flow region, and the inner side and the outer side of the polysilicon bus respectively form a contact hole for connecting the P-type ring to a source electrode formed by a front metal layer. When the super-junctiondevice is in a reverse direction, a terminal current passes through the P-type ring and is simultaneously conducted to the source electrode through the contact holes at the inner side and the outer side, the terminal current is far away from a parasitic triode located in the charge flow region by employing the characteristic that the contact hole at the outer side is far from the charge flow region, and the EAS capability of the device is enhanced. According to the super-junction device, the EAS capability of the device can be improved.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit, in particular to a super junction device. Background technique [0002] The super-junction MOSFET adopts a new voltage-resistant layer structure, and uses a series of superjunction structures composed of alternately arranged semiconductor P-type thin layers and N-type thin layers to combine P-type thin layers and N-type thin layers at lower voltages in the off state. The N-type thin layer is depleted to achieve mutual compensation of charges, so that the P-type thin layer and N-type thin layer can achieve high breakdown voltage under high doping concentration, thereby obtaining low on-resistance and high reverse breakdown at the same time Voltage (BV), that is, super junction MOSFET is to use PN, that is, P-type thin layer and N-type thin layer charge balance to reduce the surface electric field (Resurf) technology in the body to improve the BV of the device while maintaining a small on-resis...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/06H01L23/48H01L21/768H01L21/336
Inventor 李昊
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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