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Preparation method of SOI (Silicon-On-Insulator) substrate material

A technology of silicon substrates and silicon substrates, applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve the problems of low surface resistivity of substrates, affecting device performance, and easy introduction of impurities Effects of RF substrate loss, increasing linear characteristics, and suppressing surface parasitic conductance

Inactive Publication Date: 2018-03-09
SHENYANG SILICON TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] 3. High-resistance SOI substrate: This type of substrate has structural advantages, but its performance is worse than that of the first type
However, diffusion of oxygen atoms, heat treatment process lead to low surface resistivity of the formed substrate
These two reasons are currently out of control
[0007] 4. On the basis of the third type, the high-resistance SOI substrate type substrate is improved by adding a defect layer. The conventional defect layer growth is easy to introduce impurities, which affects the final performance of the device.

Method used

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  • Preparation method of SOI (Silicon-On-Insulator) substrate material

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Embodiment 1

[0039] The present embodiment provides a kind of preparation method of SOI silicon substrate, and this substrate refers to the SOI substrate sheet with doped polycrystalline or doped amorphous silicon layer, and its preparation comprises the following steps:

[0040] 1. Provide high-resistance silicon wafers (silicon wafer resistivity greater than 500ohm.cm), and use DHF, SC1 and SC2 to clean the surface in order to remove the natural oxide layer and pollutants on the silicon wafer surface ( figure 1 (a)).

[0041] 2. Reference figure 1 (b), prepare a silicon oxide layer on the surface of the high-resistance silicon wafer, and the thickness of the grown oxide layer is 200A;

[0042] 3. In figure 1 On the basis of (b), prepare a doped polysilicon layer ( figure 1 (c)), the thickness is 2 μm, the doping type is P type, and the resistivity is 1ohm.cm.

[0043] 4. Use figure 1 (c) The formed silicon substrate is formed by using "TM-SOI intelligent cutting method" to form SOI....

Embodiment 2

[0046] This embodiment provides a method for preparing an SOI silicon substrate, which refers to an SOI substrate sheet with a doped polycrystalline or doped amorphous silicon layer, and its preparation includes the following steps:

[0047] 1. Provide high-resistance silicon wafers (silicon wafer resistivity greater than 500ohm.cm), and use DHF, SC1 and SC2 to clean the surface in order to remove the natural oxide layer and pollutants on the silicon wafer surface ( figure 1 (a)).

[0048] 2. Reference figure 1 (b), prepare a silicon oxide layer on the surface of the high-resistance silicon wafer, and the thickness of the grown oxide layer is 200A;

[0049] 3. In figure 1 On the basis of (b), prepare a doped polysilicon layer ( figure 1 (c)), the thickness is 2 μm, the doping type is N type, and the resistivity is 10ohm.cm. .

[0050] 4. Use figure 1 (c) The formed silicon substrate is formed by using the "TM-SOI intelligent cutting method" to form SOI.

[0051] 5. CPW ...

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Abstract

The invention discloses a preparation method of an SOI (Silicon-On-Insulator) substrate material and belongs to the SOI wafer preparation technical field. According to the method, the substrate material is an SOI substrate wafer with a doped polycrystalline silicon layer or doped amorphous silicon layer. The preparation method of the invention includes the following steps that: (1) a high-resistance silicon wafer is provided; (2) a silicon oxide layer is prepared on the surface of the high-resistance silicon wafer, the thickness of the silicon oxide layer is 150 to 600 angstroms; and (3) a doped polycrystalline silicon layer or doped amorphous silicon layer is prepared on the surface of the silicon oxide layer, so that the SOI substrate sheet with the doped polycrystalline silicon layer orthe doped amorphous silicon layer is obtained. According to the SOI substrate wafer, the doped polycrystalline silicon layer or doped amorphous silicon layer is applied; the doped polycrystalline silicon layer or doped amorphous silicon layer can be effectively connected with silicon oxide; and therefore, parasitic conductance on the surface of the silicon substrate can be effectively suppressed,capacitance variation can be limited, the power of generated harmonics can be reduced, and thus, the loss of the resistivity of the high-resistance SOI substrate can be minimized.

Description

technical field [0001] The invention relates to the technical field of SOI sheet preparation, in particular to a method for preparing an SOI silicon substrate material, and the prepared silicon substrate is mainly used in radio frequency equipment. Background technique [0002] The materials currently used for RF front-end modules are as follows: [0003] 1. SOQ (silicon on silicon on quartz), SOS (silicon on sapphire sapphire): SOQ is the same as traditional SOI, it produces lower leakage current, due to its lower parasitic capacitance, high frequency Circuit performance has been improved. The advantage of SOS is its excellent electrical insulation, which can effectively prevent the radiation caused by stray currents from spreading to nearby components. Substrates such as SOQ and SOS can achieve excellent RF performance, but there are very few such structures, so they are very expensive. [0004] 2. High-resistance substrate silicon: its resistivity is above 500ohm.cm. T...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/762H01L27/12
Inventor 李捷高文琳
Owner SHENYANG SILICON TECH
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