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Interpolation-based model checking path reduction method and computer

一种模型检测、插值的技术，应用在计算、错误检测/纠正、软件测试/调试等方向，能够解决验证崩溃、细化次数多、消耗等问题

Active Publication Date: 2018-03-27
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] To sum up, the problems existing in the existing technology are: for large-scale systems, abstract models are refined too many times during verification, and the bottleneck of model checking is state explosion, which consumes a lot of memory and time, leading to verification collapse

Method used

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  • Interpolation-based model checking path reduction method and computer
  • Interpolation-based model checking path reduction method and computer
  • Interpolation-based model checking path reduction method and computer

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0121] figure 2 It is the program to be tested and its CFG in Embodiment 1, wherein the target node is L11, and the terminal point is L9. Verify whether the program is safe by verifying the reachability of the target node L11. If L11 is reachable, the program is not safe. Otherwise, the program is safe. The specific verification steps are as follows:

[0122] The realization of the present invention is based on the abstract model detection of CEGAR, which judges the accessibility of a state through the abstract predicate, that is, R interpolation, thereby continuously carrying out the process of counterexample-refinement-abstract, and accurately verifying the program. In order to illustrate the difference and advantages between the interpolation proposed by the present invention and R interpolation, the detection process using only R interpolation is introduced first. image 3 is the path traversed by the verification program using only R interpolation without using S int...

Embodiment 2

[0154] Figure 9 It is the program to be tested and its CFG in Embodiment 2, wherein the target node is L13, and the end point is L4. Verify whether the program is safe by verifying the reachability of the target node L13. If L13 is reachable, the program is not safe. Otherwise, the program is safe. Figure 10 Shows the path traversed using the W value. The specific steps are as follows:

[0155] Step 1: Crop CFG, remove useless edges and nodes, indicated by dotted lines. The process of initializing the properties of the nodes is the same as that in Embodiment 1. At the same time, the W value of all sides is ⊥.

[0156] Step 2: Same as in Embodiment 1, use three kinds of interpolation to expand CFG to generate ARG. Until the first counterexample path P1 is found, such as Figure 10 (1), calculate three kinds of interpolation. Also calculate the W value of the edge. Since L10 is not reachable in P1, but L8 is reachable, the calculation starts from edge e:(L7, a=2, L8)...

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Abstract

The invention belongs to the field of computer application technology and discloses an interpolation-based model checking path reduction method and a computer. According to the method, a C program isread, syntactic and semantic analysis is performed on the C program, and a control flow graph (CFG) is extracted from an abstract syntax tree; a safety (S) interpolation value and an error (E) interpolation value are added to the CFG, and the CFG is expanded; and in the process of generating an ARG according to the CFG, whether the safety interpolation value and the error interpolation value are contained in a current path formula is judged in each state. Through the method, by calculating the S interpolation value and the E interpolation value, checking efficiency is improved, and a model checking algorithm can be better applied to a large-scale program; unnecessary exploration of the S interpolation value is avoided, and the number of states of the ARG is greatly reduced; the E interpolation value can be used for quickly judging whether a true counterexample path exists in the program, verification of the program is accelerated, and efficiency is improved; and useless nodes and edgesin the CFG are clipped, so that a traversal state space is reduced.

Description

technical field [0001] The invention belongs to the technical field of computer applications, and in particular relates to an interpolation-based model detection path reduction method and a computer. Background technique [0002] With the rapid development of science and technology and the continuous improvement of industrial requirements, the complexity of various hardware and software designs is also increasing, and the requirements for reliability and security are also increasing. The reliability, security and correctness of the system have been widely concerned by the scientific and industrial circles. Formal verification and testing are the main methods to solve this problem. Formal verification methods began in the late 1960s with Floyd, Hoare and Manna's research on program specification and verification. Formal verification methods fall into two categories: theorem-based and model-based. Model Checking, which was proposed in the early 1980s, is a model-based forma...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/36
CPCG06F11/3608
Inventor 田聪段钊段振华
Owner XIDIAN UNIV
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