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Nonvalatile semiconductor memory device
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A storage device, non-volatile technology, applied in the field of non-volatile semiconductor storage devices
Active Publication Date: 2018-11-02
CHANGXIN MEMORY TECH INC
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[0004] Embodiments of the present invention provide at least one non-volatile semiconductor storage device to solve or alleviate one or more technical problems in the prior art
Method used
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[0073] The MOS transistor 110 has a substrate 114, a gate region 111, a source region 112 and a drain region 113. In this embodiment, the MOS transistor 110 is an N-type (Negative channel, N channel) transistor, that is, the substrate 114 is a P type, the source region 112 and the drain region 113 are doped with N-type particles. In a variable embodiment, the MOS transistor 110 may also be a P-type (Positive channel, P-channel) transistor, that is, the substrate 114 is N-type, and the source region 112 and the drain region 113 are doped with P-type particles.
[0074] The gate region 111 includes a gate oxide 111A and a gate 111B above the gate oxide 111A, wherein the material o...
Embodiment 2
[0095] like Image 6 Shown is a structural diagram of the non-volatile semiconductor storage device 200 of this embodiment, the difference from Embodiment 1 is that the barrier layer 120, the floating gate 130, the tunnel oxide layer 140 and the control gate 150 are sequentially deposited on the source region 112 Above, the control gate 150 is connected to the first voltage Vs, and the drain region 113 is connected to the second voltage Vd.
[0098] Control the MOS transistor 110 to turn on, the first voltage Vs is a negative voltage, the second voltage Vd is a positive voltage, and the difference between Vs and Vd is 9V to 18V (including 9V and 18V), for example, Vs=-3V, Vd =7V.
[0099] After the MOS transistor 110 is turned on, the voltage of the drain region 113 (Vd=7V) is transmitted to the s...
Embodiment 3
[0109] like Figure 7 Shown is the structure diagram of the non-volatile semiconductor storage device 300 of this embodiment, the difference from the first embodiment is that the tunnel oxide layer 140, the floating gate 130, the barrier layer 120 and the control gate 150 are sequentially deposited on the drain region 113 Above, the barrier layer 120 includes a barrier oxide layer 121 and a dielectric layer 122 deposited on the barrier oxide layer 121 .
[0110] The nonvolatile semiconductor memory device 300 of this embodiment has a write operation mode, an erase mode, and a read operation mode.
[0111] (1) Write operation mode
[0112] Control the MOS transistor 110 to turn on, the first voltage Vs is a negative voltage, the second voltage Vd is a positive voltage, and the difference between Vs and Vd is 9V to 18V (including 9V and 18V), for example, Vs=-3V, Vd =7V.
[0113] After the MOS transistor 110 is turned on, the voltage of the source region 112 (Vs=-3V) is trans...
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Abstract
The invention provides a nonvalatile semiconductor memory device which comprises a MOS transistor and a barrier layer, a floating gate, a tunneling oxide layer and a control gate which are sequentially deposited above a drain electrode region of the MOS transistor, wherein a gate electrode region is connected to a working voltage; when the gate electrode region is under the working voltage, a channel from a source electrode region to the drain electrode region is conducted, so that a voltage of the drain electrode region is consistent with that of the source electrode region; the source electrode region is connected to a first voltage, the control gate is connected to a second voltage, and when the first voltage and the second voltage enable a potential difference of both ends of the tunneling oxide layer to exceed a threshold, the tunneling oxide layer is tunneled; and the barrier layer is used for blocking charges in the floating gate from running away to the drain electrode region.The technical scheme of the invention can provide a novel nonvalatile memory device based on a DRAM architecture so as to achieve a multi-bit nonvalatile data memory function.
Description
technical field [0001] The invention relates to the technical field of semiconductor integrated circuits, in particular to a non-volatile semiconductor storage device. Background technique [0002] Memory (Memory) is a memory device used to save information in modern information technology. Its main function is to store programs and various data, and it can automatically complete the storage of programs or data at high speed during computer operation. Memory is a device with a "memory" function, and generally has three operating states: writing, erasing, and reading. [0003] The existing memory is divided into volatile memory and non-volatile memory according to the storability of information. Among them, the common volatile memory used for large-capacity storage such as Dynamic Random Access Memory (Dynamic Random Access Memory, referred to as DRAM), non-volatile memory such as NAND flash memory (Flash). Among them, NAND Flash refers to the memory whose stored data will ...
Claims
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Application Information
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