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Electron beam exposure method, electron beam lithography method and metal line preparation method

A technology of electron beam exposure and electron beam lithography, which is applied in the field of semiconductors, can solve the problems of uneven electron beam exposure and achieve the effect of small line size

Active Publication Date: 2018-11-30
THE 13TH RES INST OF CHINA ELECTRONICS TECH GRP CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] In view of this, the embodiment of the present invention provides an electron beam exposure method, an electron beam lithography method and a metal line preparation method to solve the problem of uneven electron beam exposure in the prior art

Method used

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  • Electron beam exposure method, electron beam lithography method and metal line preparation method
  • Electron beam exposure method, electron beam lithography method and metal line preparation method
  • Electron beam exposure method, electron beam lithography method and metal line preparation method

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Effect test

Embodiment 1

[0037] Please refer to figure 1 , figure 1 It is a schematic diagram of the implementation flow of the electron beam exposure method provided in Embodiment 1 of the present invention, and the method includes the following steps:

[0038] Step S101, performing a first electron beam exposure treatment on the substrate according to the first layout pattern.

[0039] In the embodiment of the present invention, L-Edit software is used to design the first layout pattern, wherein the line size of at least one line in the first layout pattern, that is, the line width, is the beam spot diameter of the electron beam. For example, if the electron beam spot diameter is 10 nanometers, then the line width of at least one line in the first layout pattern is 10 nanometers. Using an exposure machine to perform a first electron beam exposure treatment on the substrate according to the first layout pattern.

[0040] Step S102, performing a second electron beam exposure process on the substrat...

Embodiment 2

[0050] Please refer to image 3 , image 3 It is a schematic diagram of the implementation flow of the electron beam lithography method provided in Embodiment 2 of the present invention, and the method includes the following steps:

[0051] Step S201, coating electron beam photoresist on the surface of the substrate.

[0052] In an embodiment of the present invention, the electron beam photoresist is spin-coated on the surface of the substrate, wherein the rotation speed in the spin coating is 2000 rpm to 5000 rpm, and a hot plate of 160 to 190 degrees Celsius is used to bake the glue 2 minutes to 5 minutes. The e-beam photoresist can be PMMA, type C2.

[0053] Step S202, performing a first electron beam exposure treatment on the substrate according to the first layout pattern.

[0054] Step S203, performing a second electron beam exposure process on the substrate according to the second layout pattern, wherein the second layout pattern is the first layout pattern shifted ...

Embodiment 3

[0060] Please refer to Figure 4 , Figure 4 It is a schematic flow chart of the method for preparing a metal wire provided in Embodiment 3 of the present invention, and the method includes the following steps:

[0061] Step S301, coating electron beam photoresist on the surface of the substrate.

[0062] Step S302, performing a first electron beam exposure treatment on the substrate according to the first layout pattern.

[0063] Step S303, performing a second electron beam exposure process on the substrate according to the second layout pattern, wherein the second layout pattern is the first layout pattern shifted by a preset distance along the line length direction of the first layout pattern owned.

[0064] Step S304, developing the substrate after the second electron beam exposure treatment.

[0065] The implementation manner of step S301 to step S301 is the same as the implementation manner of step S201 to step S204 in the second embodiment of the present invention, ...

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Abstract

The invention provides an electron beam exposure method, an electron beam lithography method and a metal line preparation method, applied to the technical field of semiconductor. The electron beam exposure method comprises the following steps: performing first electron beam exposure process on the substrate according to a first layout pattern; and performing second electron beam exposure process on the substrate according to a second layout pattern, wherein the second layout pattern is obtained by shifting the first layout pattern along a line length direction in the first layout pattern by apreset distance. According to the invention, two exposure treatments are performed, and the superposition of the effects of the two exposures avoids breakpoints due to insufficient energy at beam spotsplicing positions, so that the entire pattern is uniformly exposed; moreover, it is not necessary to increase the exposure dose, and a small line size can be ensured.

Description

technical field [0001] The invention belongs to the technical field of semiconductors, and in particular relates to an electron beam exposure method, an electron beam photolithography method and a metal line preparation method. Background technique [0002] Electron beam exposure technology is a new technology that integrates high technologies such as electron optics, precision machinery, ultra-high vacuum, and computer automatic control. It is one of the key technologies to promote the further development of microelectronics and microfabrication technology. Electron beam lithography technology is mainly suitable for ultra-fine processing below 0.5 microns, and can realize the exposure of tens of nanometer lines. [0003] Electron beam exposure is a Gaussian circular beam that writes layout graphics point by point, and the size of the layout graphics is an integer multiple of the diameter of the electron beam spot. When the size of the layout pattern is equal to the diamete...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G03F7/20H01L21/02
CPCG03F7/2022G03F7/2059H01L21/02697
Inventor 韩婷婷冯志红吕元杰敦少博顾国栋
Owner THE 13TH RES INST OF CHINA ELECTRONICS TECH GRP CORP
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