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Resistance value measurement circuit device and method for semiconductor memory

A technology of circuit device and resistance value, which is applied in the field of resistance value measurement circuit device of semiconductor memory, to achieve the effect of avoiding influence and avoiding contact resistance

Pending Publication Date: 2018-12-18
CHANGXIN MEMORY TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] Embodiments of the present invention provide a resistance value measurement circuit device and a resistance value measurement method of a semiconductor memory to solve or alleviate one or more technical problems in the prior art

Method used

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  • Resistance value measurement circuit device and method for semiconductor memory
  • Resistance value measurement circuit device and method for semiconductor memory
  • Resistance value measurement circuit device and method for semiconductor memory

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0093] Such as figure 2 As shown, the resistance value measurement circuit device 200 of this embodiment includes a first calibrated unit 230, a first protection unit 240, and a first measurement switch transistor T5. By measuring the resistance value of the first calibrated unit 230, further Calibrate the resistance value of the first calibrated unit 230 .

[0094] The first unit to be calibrated 230 is connected between the first voltage interface 211 and the first reading interface 221, and the first connection point A1 is formed at the place where the first unit to be calibrated 230 is connected to the first voltage interface 211 The first measurement switching transistor T5 is connected between the first connection point A1 and the second read interface 222 ; the first protection unit 240 is connected between the second voltage interface 212 and the first read interface 221 .

[0095] Preferably, the first measurement switch transistor T5 is an N-type metal oxide semico...

Embodiment 2

[0113] Such as Figure 4 As shown, this embodiment provides a measurement circuit 300 for a semiconductor memory. The difference from Embodiment 1 is that a second calibrated unit 350, a second protection unit 360 and a second measurement switching transistor T6 are added, and the throughput The resistance value of the second unit to be calibrated 350 is measured, and then the resistance value of the second unit to be calibrated 360 is calibrated.

[0114] The second unit to be calibrated 350 is connected between the second voltage interface 212 and the first reading interface 221, and the second connection point A2 is formed at the place where the second unit to be calibrated 350 is connected to the second voltage interface 212 The second measurement switch transistor T6 is connected between the second connection point A2 and the third read interface 323 ; the second protection unit 360 is connected between the first voltage interface 211 and the first read interface 221 .

...

Embodiment 3

[0136] This embodiment provides a method for measuring the resistance of a semiconductor memory, which can be based on the resistance measuring circuit device 300 described above.

[0137] Such as Figure 6 As shown, a voltage difference is provided between the first voltage interface 211 and the second voltage interface 212 , for example, the operating voltage VDD is applied to the first voltage interface 211 , and the ground voltage VSS is applied to the second voltage interface 212 .

[0138] Wherein, the working voltage VDD and the grounding voltage VSS may come from the interface card of the testing machine.

[0139] Turn on the first measurement switch transistor T5 and turn on the second measurement switch transistor T6. It should be noted that the first measurement switch transistor T5 and the second measurement switch transistor T6 may not always be turned on. When measuring the first calibrated unit 230, the first measurement switch transistor T5 is turned on and th...

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Abstract

The invention provides a resistance value measurement circuit device and method for a semiconductor memory. The measurement circuit device comprises a first calibrated unit connected between a first voltage interface and a first reading interface, a first protection unit connected between a second voltage interface and the first reading interface, and a first measurement switch transistor connected between a first connection point and a second reading interface, wherein the first connection point is formed between the first calibrated unit and the first voltage interface; the first voltage interface and the second voltage interface are used for providing a voltage difference, so that a current passes through the first calibrated unit and the first protection unit; and when the first measurement switch transistor is in a conducting state, a resistance value of the first calibrated unit is obtained by measuring the voltages of the first reading interface and the second reading interfaceand the current of the first calibrated unit, so that the influence of contact resistance can be avoided and a resistance value of an internal resistor of a data interface of the semiconductor memorycan be accurately measured.

Description

technical field [0001] The invention relates to the technical field of semiconductor integrated circuits, in particular to a resistance measuring circuit device and a resistance measuring method of a semiconductor memory. Background technique [0002] Memory (Memory) is a memory device used to store information in modern information technology, such as Dynamic Random Access Memory (Dynamic Random Access Memory, DRAM for short). The read port of DRAM is designed to control the high or low potential of the read port and the amount of current it consumes through a resistor. Therefore, the resistance value of the resistor needs to be within a fixed specification, but due to the manufacturing process It will cause the resistance value of the manufactured resistors to be non-uniform, so it needs to be corrected by measuring with a testing machine. [0003] Such as figure 1 Shown is the measurement circuit 100 of the resistance value of the reading port of the prior art DRAM, inc...

Claims

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Application Information

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IPC IPC(8): G01R31/26G01R27/02G11C29/56
CPCG11C29/56G01R27/02G01R31/26
Inventor 不公告发明人
Owner CHANGXIN MEMORY TECH INC
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