A method for realizing a wideband digital predistorter
A technology of digital predistortion and implementation method, which is applied in the realization of wideband digital predistorter and the field of wideband power amplifier linearization, and can solve the problem that FPGA cannot realize digital predistorter, high-speed multiplier and adder, and model input and output Problems such as timing design difficulties, to achieve the effect of reducing system processing rate, low complexity, and wide linear bandwidth
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Embodiment 1
[0045] As a preferred embodiment of the present invention, with reference to the attached Figure 1-5 , this example discloses:
[0046] A method for realizing a wideband digital predistorter, comprising the steps of:
[0047] Step A, obtaining the feedback signal y(n) of the power amplifier, expressed as:
[0048]
[0049] Where y(n) is the output of the model, x(n) is the input of the model, a km is the coefficient of the model, K and M are the nonlinear order and memory depth of the model respectively;
[0050] Step B, observe whether there is spectrum expansion in y(n), and judge whether it is linear, if the spectrum of y(n) does not expand, then the linear effect converges, and directly enter step G; if the spectrum of y(n) expands, Then nonlinear distortion occurs, the linear effect does not converge, and enters step C;
[0051]Step C, decomposing the memory polynomial model in step A into M paths, then the memory polynomial model is expressed as:
[0052]
[...
Embodiment 2
[0068] As another preferred embodiment of the present invention, with reference to the attached Figure 1-5 , this example discloses:
[0069] A method for realizing a wideband digital predistorter, comprising the following steps:
[0070] Step A, obtain the feedback signal y(n) of the power amplifier by the ADC acquisition card, express as:
[0071]
[0072] Where y(n) is the output of the model, x(n) is the input of the model, a km is the coefficient of the model, K and M are the nonlinear order and memory depth of the model respectively;
[0073] Step B. Observe whether y(n) has spectrum expansion through the spectrum analyzer to judge whether it is linear. If the spectrum of y(n) does not expand, it means that the linear effect is converged, and then directly enter step G; if y(n) ) has expanded, indicating that nonlinear distortion has occurred, and the linear effect has not converged, and enters step C;
[0074] Step C, decomposing the memory polynomial model in s...
Embodiment 3
[0097] Such as Figure 6 as shown, Figure 6 It is the linearization result diagram of the actual measurement of the power amplifier in the implementation case of the proposal of this application. This implementation case predistorts 64QAM with a symbol rate of 100Msps and a bandwidth of 125MHz. The traditional predistorter requires a working frequency of 750MHz, which cannot be implemented in FPGA. However, this implementation case decomposes the predistorter model into 8 channels. DPD core parallel computing, the required baseband clock can be reduced to 750 / 8 = 93.75MHz, which greatly reduces the operating frequency of FPGA. From Figure 6 It can be seen that the broadband digital predistorter in this implementation case has good linearization capability.
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