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Input-output device, integrated circuit and manufacturing method

A technology of input and output devices and manufacturing methods, applied in semiconductor/solid-state device manufacturing, circuits, electric solid-state devices, etc., can solve the problems affecting the reliability of IO devices, large leakage current of IO devices, etc., and improve the drain leakage current effect , reduce leakage current, simple process effect

Active Publication Date: 2019-01-15
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] In the CMOS (Complementary Metal Oxide Semiconductor, Complementary Metal Oxide Semiconductor) process, in order to enable the core device to obtain higher performance, usually all source and drain regions including the source and drain regions (S / D) of the IO device High-dose doping, but this will cause the problem of excessive leakage current of IO devices, which seriously affects the reliability of IO devices

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  • Input-output device, integrated circuit and manufacturing method
  • Input-output device, integrated circuit and manufacturing method
  • Input-output device, integrated circuit and manufacturing method

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Embodiment Construction

[0051]As the most basic semiconductor device, transistors are currently being widely used. Therefore, with the increase of component density and integration of semiconductor devices, the gate size of planar transistors is getting shorter and shorter. The ability of traditional planar transistors to control channel current Weakened, resulting in short channel effect, resulting in leakage current, and ultimately affecting the electrical performance of semiconductor devices. In order to overcome the short-channel effect of the transistor and suppress the leakage current, a Fin Field Effect Transistor (FinFET) is proposed in the prior art. FinFET is a common multi-gate device. Please refer to figure 1 , a method of manufacturing a FinFET IO device integrated with a core device on the same semiconductor substrate using "high-K&gate last" technology, comprising the following steps:

[0052] S11, providing a semiconductor substrate with a fin 101 and a dummy gate stack structure on...

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Abstract

A method for manufacturing an input / output device and an integrated circuit, the multi-layer work function layer of the input / output device is not uniformly covered in the lateral direction at the bottom of the gate opening of the input / output region, that is, a multilayer work function layer which is not uniformly distributed in the lateral direction at the bottom of the metal gate electrode layer in the input / output region is formed, The GIDL effect of the input / output device is greatly improved, and the leakage current of the input / output device is effectively reduced, and the reliability of the input / output device and the whole integrated circuit is improved. The electric field near the interface of the metal gate stack structure of the input / output device can be reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductor device manufacturing, in particular to an input and output device, an integrated circuit and a manufacturing method. Background technique [0002] With the rapid development of integrated circuit manufacturing technology, in order to achieve faster computing speed, larger data storage capacity and more functions, integrated circuit chips are developing towards higher device density and higher integration. Usually a complete set of integrated circuits includes at least one core device (Core device) and at least one input and output device (IO device, IO device) integrated on the same semiconductor substrate, the core device is formed in the core device area, used To realize the main functions of the integrated circuit, the input and output devices are formed in the input and output area, and are used to provide corresponding input signals for the core devices or output corresponding signals o...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/088H01L21/8234
CPCH01L21/823431H01L27/0886
Inventor 蒲月皎吴永皓
Owner SEMICON MFG INT (SHANGHAI) CORP