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Thin film transistor and manufacturing method thereof and electronic device

A technology of thin-film transistors and manufacturing methods, which is applied in the direction of transistors, semiconductor/solid-state device manufacturing, circuits, etc., and can solve problems such as the hump effect

Active Publication Date: 2019-03-22
BOE TECH GRP CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Thin film transistors rely on the active layer to form a conductive channel to conduct, and the active layer tends to accumulate voltage in the edge area, causing the edge area to conduct earlier than the non-edge area, resulting in a hump effect

Method used

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  • Thin film transistor and manufacturing method thereof and electronic device
  • Thin film transistor and manufacturing method thereof and electronic device
  • Thin film transistor and manufacturing method thereof and electronic device

Examples

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no. 1 example

[0035] Figure 2A Is a schematic top view of the thin film transistor 200 according to the first embodiment of the present invention, Figure 2B for Figure 2A A schematic cross-sectional structure diagram of the middle thin film transistor 200 along the cross-sectional line C-C'.

[0036] Please refer to Figure 2A with Figure 2B The thin film transistor 200 with a bottom gate structure includes a gate 202, an auxiliary layer 203, a gate insulating layer 204, an active layer 205, a source 206 and a drain 207 which are sequentially stacked on the substrate 201. The active layer 205 includes The channel region 208 between the source electrode 206 and the drain electrode 207 includes an edge region 209 along the channel length direction and a body region 210 excluding the edge region 209. The auxiliary layer 203 is provided between the gate 202 and the gate insulating layer 204 and is provided corresponding to the edge region 209 of the channel region 208. The projections of the a...

no. 2 example

[0043] image 3 It is a schematic cross-sectional structure diagram of a thin film transistor 200 according to the second embodiment of the present invention. See image 3 The structure of the thin film transistor of the second embodiment of the present invention is basically the same as that of the first embodiment, and the difference lies only in the location and material of the auxiliary layer 203. As shown in the figure, the auxiliary layer 203 is disposed between the active layer 205 and the gate insulating layer 204. In this embodiment, the auxiliary layer 203 is an auxiliary active layer, and its material is a semiconductor material.

[0044] As shown in the figure, the auxiliary layer 203 is two auxiliary active layers arranged at intervals, and the two auxiliary active layers are arranged corresponding to the two edge regions 209 of the channel region 208 respectively. In another example, the auxiliary layer includes only one auxiliary active layer, which corresponds to...

no. 3 example

[0048] Figure 4A Is a schematic top view of the thin film transistor 200 according to the third embodiment of the present invention, Figure 4B for Figure 4A A schematic cross-sectional structure diagram of the middle thin film transistor 200 along the D-D' section line. For the sake of convenience, the same components are given the same numbers, and the details are not repeated below. Please refer to Figure 4A with Figure 4B The thin film transistor 200 with a top gate structure includes a source 206 and a drain 207, an active layer 205, a gate insulating layer 204, an auxiliary layer 203, and a gate 202 which are sequentially stacked on a substrate 201. The active layer 205 includes The channel region 208 of the gate insulating layer 204 includes an edge region 209 along the channel length direction and a body region 210 outside the edge region 209. The auxiliary layer 203 is disposed between the gate 202 and the gate insulating layer 204 and is disposed corresponding to ...

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Abstract

A thin film transistor and a manufacturing method thereof and an electronic device are provided. The thin film transistor comprises a substrate, and a gate, a gate insulating layer, an active layer, asource and a drain which are arranged on the substrate. The active layer comprises a channel region located between the source and the drain. The channel region consists of an edge region along the length direction of a channel and a main region outside the edge region. The thin film transistor further comprises an auxiliary layer located between the gate and the active layer. The auxiliary layeroverlaps at least partially with the projection of the edge region of the channel region on the substrate, and is used to increase the turn-on voltage of the edge region of the channel region.

Description

Technical field [0001] The embodiment of the present invention relates to a thin film transistor, a manufacturing method thereof, and an electronic device. Background technique [0002] Thin-film transistors (TFTs) are important components of some electronic devices. For example, thin-film transistors are switching components of pixel circuits in active display devices. Thin film transistors rely on the active layer to form a conductive channel to conduct, and the active layer tends to accumulate voltage in the edge area, which causes the edge area to be turned on earlier than the non-edge area, resulting in a hump effect. Summary of the invention [0003] An embodiment of the present invention provides a thin film transistor, including a substrate, a gate electrode disposed on the substrate, a gate insulating layer, an active layer, and source and drain electrodes. The active layer includes And the channel region between the drain and the channel region, the channel region inclu...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/786H01L29/41H01L21/336
CPCH01L29/41H01L29/66742H01L29/786H01L29/42384H01L29/4908G02F1/1368H01L27/1222H01L27/127H01L29/66765H01L29/78678H01L29/78696H10K59/1213
Inventor 王骏黄中浩赵永亮林承武
Owner BOE TECH GRP CO LTD
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