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Array substrate and preparation method thereof

A technology for array substrates and base substrates, applied in the field of array substrates and their preparation, can solve problems affecting the electrical quality of panels, uneven film formation of gate insulating layers, and affecting normal display of panels, etc., to improve panel driving performance, improve Hump ​​effect, the effect of improving uneven thickness

Active Publication Date: 2020-07-10
WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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AI Technical Summary

Problems solved by technology

In a TFT device, through voltage driving, a current along the direction of the polysilicon layer can be formed, which is the main driving current for in-plane display; however, since the gate insulating layer 604 at the edge of the polysilicon layer 602 is relatively thin, that is, a1> a2, which is equivalent to two parasitic TFTs connected in parallel with the main TFT, which will cause the edge channel to be turned on in advance, a vertical edge current will appear, and a hump effect (Hump effect) will appear (such as Figure 7 I-V curve), affecting the normal display of the panel
[0003] To sum up, in the existing TFT substrate manufacturing process, there are phenomena of uneven thickness of other film layers caused by the edge of the metal light-shielding layer, and uneven film formation of the gate insulating layer caused by the protrusion of the polysilicon layer, thus causing the hump effect of the TFT. , affecting the electrical quality of the panel

Method used

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  • Array substrate and preparation method thereof
  • Array substrate and preparation method thereof
  • Array substrate and preparation method thereof

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preparation example Construction

[0047] Such as figure 2 As shown, it is a flow chart of the preparation method of the array substrate provided by the embodiment of the present invention. The above preparation method of the array substrate includes the following steps:

[0048] Step S1: providing a base substrate, on which a metal light-shielding layer, a first buffer layer, and a second buffer layer are sequentially prepared;

[0049] Step S2: performing a photolithography process on the second buffer layer, so that the second buffer layer forms a predetermined groove at a position corresponding to the metal light-shielding layer;

[0050] Step S3: preparing a layer of polysilicon film on the second buffer layer, and forming a polysilicon layer corresponding to the groove after patterning, and the polysilicon layer is in the same plane as the surface of the second buffer layer.

[0051] Specifically, refer to Figures 3a-3d As shown in FIG. 1 , it is a schematic flow chart of the array substrate preparati...

Embodiment 2

[0056] Embodiment 2 provides another method for preparing the array substrate of the present invention. In this embodiment, a further improvement is made on the scheme of Embodiment 1, such as Figure 4 As shown, the method includes the following steps:

[0057] Step S101: providing a base substrate, on which a patterned metal light-shielding layer is prepared, and first coating a first buffer layer with the same thickness as the metal light-shielding layer on the base substrate;

[0058] Step S102: pattern the first buffer layer, etch the corresponding part of the first buffer layer corresponding to the metal light-shielding layer, so that the thickness of the patterned first buffer layer and the metal light-shielding layer are between same plane;

[0059] Step S103: coating the first buffer layer with a predetermined thickness on the patterned first buffer layer and the metal light-shielding layer;

[0060] Step S104: coating a second buffer layer on the first buffer layer...

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Abstract

Provided are an array substrate and a manufacturing method thereof. The array substrate comprises the following layers sequentially formed on a base substrate: a metal light-shielding layer, a first buffer layer, a second buffer layer, a polysilicon layer, a gate insulation layer, and a gate. The second buffer layer has a pre-formed recess arranged at a position corresponding to the polysilicon layer. The polysilicon layer is positioned inside the recess and is co-planar with the second buffer layer, thereby solving a problem in which layers of an array substrate have non-uniform thicknesses.

Description

technical field [0001] The present invention relates to the technical field of display panel manufacturing, in particular to an array substrate and a preparation method thereof. Background technique [0002] In recent years, with the rapid development of display technology and the maturity of the semiconductor display industry, people have higher and higher requirements for display panels. In the liquid crystal panel manufacturing process, the TFT substrate is made by 12 to 14 photolithography processes, the film layer structure is complex, the production process is cumbersome, and the requirements for process precision are getting higher and higher. Because the metal light-shielding layer 601 arranged in matrix is ​​formed by the LS film layer of the first photolithography, there will be obvious protrusions (taper) on the edge of each rectangular metal light-shielding layer 601, and the film layer will be uneven in the subsequent film layer production. . Especially obviou...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/12G02F1/133
CPCG02F1/1333G02F1/133302H01L27/1248H01L27/1259H01L27/1288
Inventor 高玲
Owner WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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