Structure and method of forming a semiconductor device

Abstract

The invention discloses a structure of a semiconductor device. The semiconductor device is fabricated by using a conventional semiconductor substrate, and fully isolated NMOS and PMOS devices can be manufactured without using an SOI substrate through a stacking process and a back trench process. At the same time, through the back N+ implant and P+ implant, back contact hole and the back metal layer processes, a P well of the NMOS is grounded, and an N well of the PMOS is connected to a power supply. Back contact holes are densely arranged on a silicon substrate, the series resistance is reduced, the thermal conductivity is increased, the floating body effect and the self-heating effect of a SOI device are avoided, and the deterioration of device performance is prevented. The present invention also discloses a method for forming the structure of the semiconductor device.

Description

technical field [0001] The present invention relates to the technical field of semiconductor processing, and more particularly, to a structure and a forming method of a semiconductor device. Background technique [0002] For half a century, the semiconductor industry has followed Moore's Law to shrink transistor size, increase transistor density, and improve performance step by step. However, as the size of bulk silicon transistor devices with planar structure is getting closer to the physical limit, Moore's law is getting closer to its end; therefore, some new structures of semiconductor devices called "non-classical CMOS" have been proposed. These technologies include FinFET, carbon nanotubes and silicon on insulator (silicon oninsulator, SOI) and so on. Through these new structures, the performance of semiconductor devices can be further improved. [0003] Among them, SOI technology has attracted widespread attention due to its simple process and superior performance. ...

AI Technical Summary

Problems solved by technology

But since the device is fully isolated, figure 1 The body region 14 of the NMOS and PMOS in the system cannot be effectively connected to the power supply or ground, forming the so-called floating body effect

Although the floating body effect can be improved through the device layout, due to the large resistance of the body region 14, the floating body effect will still appear when the body contact region is far away from the channel region, resulting in an abnormal output curve of the MOS transistor

At the same time, the thermal conductivity of the silicon dioxide 12 below the body region 14 is poor, which causes the self-heating effect of the device, reduces the carrier mobility of the device, and degrades the performance of the device.

In addition, the preparation process of SOI silicon wafer is complicated and the manufacturing cost is high

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