Automatic simulation test optimization method based on state behavior tree

Abstract

The invention discloses an automatic simulation test optimization method based on a state behavior tree. The automatic simulation test optimization method includes the following steps that a hierarchical testing script is designed; a state behavior tree model is established, and initial construction and composition of the state behavior tree are included; test optimization based on the maximum common subtree is conducted, and state behavior tree coding and maximum common subtree solution are included; and hybrid real-time task scheduling is conducted, and establishment of a task scheduling model and formulation of a task scheduling policy are included. The automatic simulation test optimization method based on the state behavior tree is used for optimization of a semi-physical and full-digital combined simulation test, can realize automation of test execution, and improves the testing efficiency; can organically combine the semi-physical and the full-digital to carry out a collaborative simulation test, and optimizes test execution; and can further conduct reasonable scheduling on the two types of simulation test tasks, and improves performance of a simulation system.

Description

technical field [0001] The invention relates to a simulation test method in the computer field, in particular to an automatic simulation test optimization method based on a state behavior tree. Background technique [0002] With the development of computer hardware and software technology, simulation testing technology has also been developed rapidly and widely used. It can not only be used as a test and verification method in the final stage of software development, but also can be used in the early stages of program demonstration and design. [0003] At present, the relatively mature simulation testing technology can be divided into two major categories of semi-physical simulation testing and full digital simulation testing in terms of different working principles. Hardware-in-the-loop simulation test is a hardware-in-the-loop simulation test method, which can be connected to the system under test through a real hardware interface, and provides a cross-linking environment...

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Problems solved by technology

[0007] (3) The hardware-in-the-loop simulation test has high real-time performance due to the characteristics of hardware-in-the-loop, while the full-digital simulation test has low real-time performance due to the need for instruction translation and is mainly oriented to functional simulation, resulting in large differences in real-time performance requirements for different test tasks. Test Scheduling Policies Difficult to Meet Requirements

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