A True Random Number Generator
A true random number and generator technology, applied in the field of information security, can solve the problems of high frequency signal duty cycle deviation, increased sequence correlation, difficulty in ensuring the duty cycle, etc., and achieves simple structure, improved randomness, Reliable effect
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Embodiment 1
[0034] Such as image 3 As shown, the counter 230 includes g D flip-flops 331, 332...33g, the QN terminal of each D flip-flop is connected to its own D terminal and used as an output, the CK input terminal of the D flip-flop 331 is connected to the external CLK clock input, and the Q The terminal is connected to the CK input terminal of the D flip-flop 332, and in turn, the CK input terminal of the D flip-flop 33g is connected to the Q terminal of 33(g-1).
Embodiment 2
[0036] Such as Figure 4 As shown, the counter 230 includes g D flip-flops 431, 432...43g and feedback logic 470. The CK terminal of each D flip-flop is connected to the external CLK clock input, and the Q terminal is connected to the feedback logic 470 as an output at the same time. The feedback logic 470 The output is connected to the D input terminals of g D flip-flops 431, 432...43g. The counter 230 can implement counting methods such as binary code and gray code through a specific feedback logic 470 circuit.
[0037] Preferably, the basic flip-flop unit inside the n bits sampling flip-flop 240 is a D flip-flop or a T flip-flop.
[0038] Preferably, the basic flip-flop unit inside the single-bit sampling flip-flop 260 is a D flip-flop or a T flip-flop.
Embodiment 3
[0040] Such as Figure 5As shown, the random number generator includes a high-frequency signal generating circuit 210 , a low-frequency sampling clock generating circuit 220 , a counter 230 , n bits sampling D flip-flop 240 , n-input exclusive OR gate 250 and single-bit sampling D flip-flop 260 . The counter 230 is composed of g D flip-flops 531, 532...53g, the QN end of each D flip-flop is connected to its own D end and used as an output, and the CK input end of the D flip-flop 531 is connected to the high-frequency signal generating circuit 210, The Q terminal is connected to the CK input terminal of the D flip-flop 332, and sequentially, the CK input terminal of the D flip-flop 53g is connected to the Q terminal of 53(g-1). The n bits sampling D flip-flop 240 is made up of n D flip-flops 541, 542...54n, and the D input terminals of the D flip-flops 541, 542...54n are respectively connected with the QN terminals of the D flip-flops 531, 532...53g (g=n ), the CK terminal is ...
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