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A True Random Number Generator

A true random number and generator technology, applied in the field of information security, can solve the problems of high frequency signal duty cycle deviation, increased sequence correlation, difficulty in ensuring the duty cycle, etc., and achieves simple structure, improved randomness, Reliable effect

Active Publication Date: 2021-04-16
成都三零嘉微电子有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The randomness of the output binary random number sequence is mainly determined by the phase jitter of the high-frequency clock signal and the low-frequency clock signal. The duty cycle of the high-frequency clock signal directly determines the distribution of "0" and "1" of the output random number. In actual design, since the high-frequency clock signal usually deviates with the process deviation, it is difficult to ensure that the duty cycle is 50%, resulting in the number of random sequences 0 and 1 generated by sampling will be unequal, and the correlation of the sequence will increase
[0004] In the traditional oscillator sampling principle true random number generator circuit, the randomness of a single source is mainly determined by the phase jitter of the oscillator. The greater the jitter, the better the randomness. Refer to patent CN 104598198 B by introducing noise plus The disturbance circuit improves the phase jitter of the low-frequency oscillator and thus improves the randomness of the output random number sequence. However, due to the deviation of the high-frequency signal duty cycle, the distribution of "0" and "1" of the output random number cannot be improved.

Method used

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Examples

Experimental program
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Effect test

Embodiment 1

[0034] Such as image 3 As shown, the counter 230 includes g D flip-flops 331, 332...33g, the QN terminal of each D flip-flop is connected to its own D terminal and used as an output, the CK input terminal of the D flip-flop 331 is connected to the external CLK clock input, and the Q The terminal is connected to the CK input terminal of the D flip-flop 332, and in turn, the CK input terminal of the D flip-flop 33g is connected to the Q terminal of 33(g-1).

Embodiment 2

[0036] Such as Figure 4 As shown, the counter 230 includes g D flip-flops 431, 432...43g and feedback logic 470. The CK terminal of each D flip-flop is connected to the external CLK clock input, and the Q terminal is connected to the feedback logic 470 as an output at the same time. The feedback logic 470 The output is connected to the D input terminals of g D flip-flops 431, 432...43g. The counter 230 can implement counting methods such as binary code and gray code through a specific feedback logic 470 circuit.

[0037] Preferably, the basic flip-flop unit inside the n bits sampling flip-flop 240 is a D flip-flop or a T flip-flop.

[0038] Preferably, the basic flip-flop unit inside the single-bit sampling flip-flop 260 is a D flip-flop or a T flip-flop.

Embodiment 3

[0040] Such as Figure 5As shown, the random number generator includes a high-frequency signal generating circuit 210 , a low-frequency sampling clock generating circuit 220 , a counter 230 , n bits sampling D flip-flop 240 , n-input exclusive OR gate 250 and single-bit sampling D flip-flop 260 . The counter 230 is composed of g D flip-flops 531, 532...53g, the QN end of each D flip-flop is connected to its own D end and used as an output, and the CK input end of the D flip-flop 531 is connected to the high-frequency signal generating circuit 210, The Q terminal is connected to the CK input terminal of the D flip-flop 332, and sequentially, the CK input terminal of the D flip-flop 53g is connected to the Q terminal of 53(g-1). The n bits sampling D flip-flop 240 is made up of n D flip-flops 541, 542...54n, and the D input terminals of the D flip-flops 541, 542...54n are respectively connected with the QN terminals of the D flip-flops 531, 532...53g (g=n ), the CK terminal is ...

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Abstract

The invention discloses a true random number generator, which comprises a high-frequency signal generating circuit, a low-frequency sampling clock generating circuit, a counter, an n bits sampling flip-flop, an n-input XOR gate and a single-bit sampling flip-flop. The true random number generator of the present invention introduces a specific sampling circuit in the oscillator sampling principle random number generator, which can effectively improve the randomness of the output random number sequence and correct the deviation of "0" and "1", and has a simple structure , high reliability.

Description

technical field [0001] The present invention relates to the field of information security, in particular to a true random number generator that uses oscillation sampling as the basic working principle and adopts a specific sampling circuit. The overall circuit adopts digital circuit design, which is stable and reliable and can be applied to various information security fields In encryption systems, it is used to generate reliable true random number sequences. Background technique [0002] With the rapid development of communication, electronic information, computer Internet and other fields, information exchange is becoming more and more frequent and close, and information security issues are attracting more and more people's attention. Random numbers are widely used in smart cards, especially in the field of cryptography, and are an important part of the hardware implementation of cryptosystems. Whether it is the public key and private key in the asymmetric algorithm, or t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F7/58
CPCG06F7/588
Inventor 冯纯益朱翔胡杨川范伟力廖乾兰程福军
Owner 成都三零嘉微电子有限公司