A kind of fce diode and its manufacturing method
A manufacturing method and trench technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problem of reducing the contact effect between the P++ doped region 201 and the second metal layer 106, weakening the soft recovery characteristics of FCE diodes, etc. problems, to achieve the effect of reducing contact resistance
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no. 1 example
[0050] image 3 It is a sectional view of the FCE diode of the first embodiment of the present invention, as image 3 As shown, it may include: a drift layer 301 , a P-type layer 302 , an N-buffer layer 303 , an N++ doped layer 304 and a P++ doped region 305 .
[0051] Specifically, the P-type layer 302 is located on the first surface of the drift layer 301 . The N-buffer layer 303 is located on the second surface of the drift layer 301 . The N++ doped layer 304 is formed by implanting N-type ions into the N-buffer layer 303 , wherein the thickness of the N++ doped layer 304 is smaller than that of the N-buffer layer 303 .
[0052] The N++ doped layer 304 is etched to form a plurality of N++ doped regions 3041 and trenches 3042 between every two adjacent N++ doped regions 3041 . The bottom 10 of the trench 3042 is in contact with the N-buffer layer 303 , that is, the bottom 10 of the trench 3042 exposes the part of the N-buffer layer 303 that has not been implanted with N-typ...
no. 2 example
[0057] Figure 4 It is a flow chart of the manufacturing method of the FCE diode of the second embodiment of the present invention, such as Figure 4 As shown, the following steps S410 to S450 may be included.
[0058] In step S410 , a P-type layer 302 is formed on the first surface of the drift layer 301 . The doping dose of the P-type layer 302 can be 10 12 cm -2 to 10 13 cm -2 , the junction depth is 2 to 10um.
[0059] In step S420, a layer of N-buffer layer 303 is formed on the second surface of the drift layer 301 to obtain the following Figure 5 Wafer shown. The doping dose of the N-buffer layer 303 can be 10 13 cm -2 to 10 14 cm -2 , the junction depth is 5 to 20um.
[0060] In step S430, to such as Figure 5 The shown N-buffer layer 303 is implanted with N-type ions to form an N++ doped layer 304, wherein the thickness of the N++ doped layer 304 is less than the thickness of the N-buffer layer 303, resulting in the following Figure 6 Wafer shown. The ...
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