Semiconductor device and forming method thereof

Abstract

Disclosed are a semiconductor device and a forming method thereof. The semiconductor device comprises a semiconductor substrate, a high-frequency type logic standard unit and a low-power-consumption type logic standard unit, wherein the semiconductor substrate comprises a high-frequency region set and a low-power-consumption region set; the high-frequency type logic standard unit is located on thehigh-frequency region set, wherein the high-frequency type logic standard unit has high-frequency type unit height, high-frequency type working frequency and high-frequency type power; the low-power-consumption type logic standard unit is located on the low-power-consumption region set, and the low-power-consumption type logic standard unit has low-power-consumption type unit height, low-power-consumption type working frequency and low-power-consumption type power; the high-frequency type unit height is larger than the low-power-consumption type unit height; the high-frequency type working frequency is greater than the low-frequency type working frequency; the high-frequency type power is greater than the low-frequency type power; the high-frequency type logic standard unit comprises a high-frequency type fin part; the low-power-consumption type logic standard unit comprises a low-power-consumption type fin part; and the effective height of the high-frequency type fin part is larger than that of the low-power-consumption type fin part. The performance of the semiconductor device is improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor device and a forming method thereof. Background technique [0002] MOS (Metal-Oxide-Semiconductor) transistors are one of the most important components in modern integrated circuits. The basic structure of the MOS transistor includes: a semiconductor substrate; a gate structure located on the surface of the semiconductor substrate, and the gate structure includes: a gate dielectric layer located on the surface of the semiconductor substrate and a gate electrode layer located on the surface of the gate dielectric layer; The source and drain doped regions in the semiconductor substrate on both sides of the pole structure. [0003] With the development of semiconductor technology, the ability of the traditional planar MOS transistor to control the channel current becomes weaker, resulting in serious leakage current. Fin Field Effect Transistor (Fin FET) i...

AI Technical Summary

Problems solved by technology

[0004] However, the performance of semiconductor devices composed of fin field effect transistors in the prior art still needs to be improved

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