Encoding circuit for converting digital output of voltage-controlled oscillator type analog-to-digital converter into binary codes

Abstract

The invention discloses an encoding circuit for converting digital output of a voltage-controlled oscillator type analog-to-digital converter into binary codes. The encoding circuit comprises a '01' boundary detection circuit, a '10' boundary detection circuit, an AND gate array and an N-bit ROM encoder. The invention further discloses an encoding method for converting the digital output of the voltage-controlled oscillator type analog-to-digital converter into the binary code. The circuit disclosed by the invention is simple in design, the code from the 2N-1-bit barrel type shift thermometercode to the N-bit binary code can be realized by only needing three stages of modules. The encoding circuit has the advantages of being small in logic depth and high in speed; the logic series, the logic depth and the key path delay are not increased along with the extension of N, and the portability is high.

Description

technical field [0001] The disclosure belongs to the technical field of integrated circuits, and in particular relates to an encoding circuit for converting digital output of a voltage-controlled oscillator type analog-to-digital converter into binary codes. Background technique [0002] The quantization of the traditional flash analog-to-digital converter (ADC) based on voltage comparison is completed by a comparator. An N-bit ADC requires 2 N - 1 comparator with an output of 2 N -1 digit thermometer code. The thermometer code of this traditional ADC is composed of continuous 1 and continuous 0, and 1 starts from the fixed lowest bit, such as figure 1 shown. The encoding circuit that converts this traditional thermometer into binary code can be implemented in circuit forms such as tree adder, multiplexer (MUX) or read-only memory (ROM). [0003] The ADC based on the ring voltage controlled oscillator (VCO) is the frontier direction of current academic research, and its ...

AI Technical Summary

Problems solved by technology

However, when the number of bits of the ADC is high, the full adder used in this method will increase exponentially, and the structure becomes more complex

More importantly, since each full adder contains three levels of gate delay, the logic depth of this circuit increases significantly with the increase in the number of ADC bits, resulting in a large circuit delay, which cannot be applied to high-speed VCO type ADC

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