Asymmetric SAR ADC capacitor switch time sequence circuit and method

Abstract

The invention discloses an asymmetric SAR ADC capacitor switch time sequence circuit which comprises a main capacitor array (1), an auxiliary capacitor array (2), a comparator (3), a first switch group (4), a second switch group (5), a third switch group (6), a first input end (VIP) and a second input end (VIN). The main capacitor array (1) is connected with the comparator (3) through the first switch group (4); the first input end (VIP) and the second input end (VIN) are connected with the main capacitor array (1) through a second switch group (5); the main capacitor array (1) is connected with the auxiliary capacitor array (2) through a switch Sp2. And the auxiliary capacitor array (2) is connected with a Vcm end through the third switch group (6). According to the switching time sequence provided by the invention, a method of combining the separation capacitor time sequence, the monotonic switching time sequence, the asymmetric capacitor array and the segmented capacitor array is adopted, so that the limitation of a high-order large capacitor on the performance of the ADC in the traditional time sequence operation is avoided, the power consumption of the ADC is reduced, and thelayout area of the ADC capacitor array is reduced.

Description

technical field [0001] The invention belongs to the field of electronic circuit integration, and in particular relates to an asymmetrical SAR ADC capacitor switching sequential circuit and method. Background technique [0002] In recent years, with the promotion of wearable devices and the development of sophisticated biological instruments, various systems have higher and higher requirements for analog-to-digital converters (ADC). Common ADCs mainly include Flash ADC, pipeline ADC, Sigma-deltaADC, and successive approximation ADC (SAR ADC). Compared with other ADCs, SAR ADC has the characteristics of simple structure, small layout area, and low power consumption. It is also comparable to modern CMOS Process compatibility is better. Therefore, in recent years, SAR ADC has been widely used in the field of digital-analog hybrid integrated circuit design with low power consumption, medium precision and moderate speed. As technology advances and supply voltages decrease, the c...

AI Technical Summary

Problems solved by technology

[0004] However, these methods can only reduce the switching power consumption and layout area of ​​SAR ADC to a certain extent, and cannot meet the increasingly higher requirements of various systems for ADCs.

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