Three-dimensional memory device with static random access memory

Abstract

An embodiment of a 3D memory device having a three-dimensional (3D) memory device includes a first semiconductor structure having a peripheral circuit, an array of SRAM cells, and a first bonding layer having a plurality of first bonding contacts. The 3D memory device further includes a second semiconductor structure which comprises an array having a 3D NAND memory string, a second bonding layer of a plurality of second bonding contacts, and a bonding interface between the first bonding layer and the second bonding layer, wherein the first bonding contacts and the second bonding contacts are in contact with each other on the bonding interface.

Description

Background technique [0001] Embodiments of the present disclosure relate to three-dimensional (3D) memory devices and methods of manufacturing the same. [0002] Planar memory cells are scaled to smaller sizes by improving process technology, circuit design, programming algorithms, and manufacturing processes. However, as the feature size of memory cells approaches the lower limit, planar processes and fabrication techniques become challenging and costly. As a result, the storage density of planar memory cells approaches the upper limit. [0003] 3D memory architectures can address density limitations in planar memory cells. A 3D memory architecture includes a memory array and peripheral devices for controlling signals to and from the memory array. Contents of the invention [0004] Embodiments of 3D memory devices with static random access memory (SRAM) and methods of manufacturing the same are disclosed herein. [0005] In one example, a 3D memory device includes a fir...

AI Technical Summary

Problems solved by technology

However, as memory cell feature sizes approach lower limits, planar processes and fabrication techniques become challenging and costly

As a result, the storage density of planar memory cells approaches the upper limit

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