Three-dimensional integrated system thermal analysis method based on silicon through hole
A technology of three-dimensional integration and through-silicon vias, which is applied in the field of microelectronics, can solve problems such as the lack of consideration of the TSV lateral thermal resistance of the three-dimensional integrated system, and the poor thermal reliability of the three-dimensional integrated system, and achieve a cost-effective and high-precision solution. Effect
Active Publication Date: 2019-11-29
GUIZHOU UNIV
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[0004] The technical problem to be solved by the present invention is to provide a thermal analysis method for a three-dimensional integrated system based on through-silicon vias, so as to solve the problem that the prior art adopts a one-dimensional thermal resistance model for the thermal analysis of a three-dimensional integrated system, which only considers the thermal analysis of the three-dimensional integrated system. The longitudinal heat transfer does not consider the lateral thermal resistance of the TSV of the three-dimensional integrated system, which makes the thermal reliability of the three-dimensional integrated system poor and other problems
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[0031] In the three-dimensional integrated system, there are four TSVs for heat dissipation around each power unit. By calculating the influence of TSVs on carrier mobility, the appropriate safe working distance between TSVs and power units can be determined. Different layers of chips are bonded through silicon dioxide or polymer materials. Wherein, the material and thickness of the TSV filling metal, the material and thickness of the insulating layer, the material and thickness of the bulk silicon, and the material and thickness of the bonding layer can be varied. The bottom surface of the underlying chip is connected to a heat sink, and the heat sink can effectively dissipate heat through heat convection, heat radiation, and heat transfer. The top view and section view of the 3D integrated system are shown in figure 1 .
[0032] Heat is dissipated mainly in two ways. The first way is to conduct heat vertically through the bulk silicon, and the second way is to conduct hea...
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The invention discloses a three-dimensional integrated system thermal analysis method based on a silicon through hole, and the method comprises the steps: decomposing the three-dimensional integratedsystem into a single power cell, considering the impact from the lateral thermal resistance and longitudinal thermal resistance of the silicon through hole in the power cell, and building a segmentedthermal resistance model; obtaining a matrix equation containing the temperatures of the upper and lower chips according to the Kirchhoff's law; establishing expressions of thermal resistances R1-R8 according to a thermal resistance expression mode in heat transfer science; substituting the expressions of the thermal resistances R1-R8 into a matrix equation containing the temperatures of the upperchip and the lower chip to solve an equation set about the temperature T so as to obtain the temperature rise condition of each layer of chip in the three-dimensional integrated system. The problemsthat in the prior art, a one-dimensional thermal resistance model is adopted for thermal analysis of a three-dimensional integrated system, only longitudinal heat transfer of the three-dimensional integrated system is considered, and transverse thermal resistance of a TSV of the three-dimensional integrated system is not considered, so that the thermal reliability of the three-dimensional integrated system is poor are solved.
Description
technical field [0001] The invention belongs to the technical field of microelectronics, and in particular relates to a thermal analysis method for a three-dimensional integrated system based on silicon through holes. Background technique [0002] Due to the continuous expansion of the circuit scale and the continuous improvement of the demand for more functions on a single substrate, the interconnection structure in the integrated circuit is becoming more and more complex, and the delay and power consumption brought by the interconnection structure are becoming more and more obvious. Stacking and bonding multi-layer chips together, and vertically connecting signals on different layers through TSV (Through Silicon Via) to realize a three-dimensional integrated circuit can not only effectively shorten the length of signal interconnection lines, but also improve system reliability. Integration. Three-dimensional integration technology is considered to be one of the effective ...
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IPC IPC(8): G06F17/50
CPCY02D10/00
Inventor 马奎杨发顺王勇勇林洁馨傅兴华
Owner GUIZHOU UNIV