Integrated circuit memory and preparation method thereof

Abstract

The invention provides an integrated circuit memory and a preparation method thereof. According to the preparation method, an inclined ion implantation process with an inclined angle is adopted. Therefore, the two adjacent sacrificial structures have different etching selectivity due to different doping concentrations; mask openings with different depths are formed in the mask material layer; etching the semiconductor substrate by taking the mask material layer as a mask. According to the invention, the grooves with different depths can be obtained, and then the adjacent buried word lines withdifferent buried depths can be formed, so that the coupling effect between the adjacent buried word lines can be restrained and reduced through the height difference between the bottom surfaces of the adjacent buried word lines, and the efficiency and reliability of the device can be improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuit manufacturing, in particular to an integrated circuit memory and a preparation method thereof. Background technique [0002] As a well-known semiconductor storage device, Dynamic Random Access Memory (Dynamic Random Access Memory, DRAM for short) is currently widely used in various electronic devices. Dynamic random access memory (DRAM) is composed of many repeated memory cells (cells), each memory cell is mainly composed of a transistor and a capacitor controlled by the transistor, and the memory cells are arranged in an array form, and each memory cell The cells are electrically connected to each other through a word line (WL for short) and a bit line (BL for short). In order to increase the density of dynamic random access memory (DRAM) to speed up the operation speed of components, and to meet the needs of consumers for miniaturized electronic devices, the recent design of the chan...

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Problems solved by technology

[0004] However, due to the continuous miniaturization of the size of semiconductor elements, the distance between the memory cells of the dynamic random access memory (DRAM) is also closer, which often leads to a very strong word line-word line coupling effect (word line-word line-coupling effect). word line coupling), that is, a serious coupling effect is likely to occur between two adjacent buried word lines 103 passing through each active region 102, which will increase coupling noise, affect device performance and reliability, and even cause DRAM data access error

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