Semiconductor structure and preparation method thereof

Abstract

The invention provides a semiconductor structure and a preparation method thereof, and the method at least comprises the steps: forming a plurality of active regions which are arranged at intervals ona semiconductor substrate, and forming a plurality of embedded gate assemblies in the active regions; forming a first isolation layer on the substrate; etching the first isolation layer to form a bitline contact hole; filling the line contact hole with a conductive material to form a bit line contact node having a first width, with a linear bit line having a second width less than the first width is formed over the bit line contact node. The bit line contact hole covers at least part of the active regions and part of the shallow trench isolation structure between the adjacent gate assembliesin the same active regions. The formed bit line is in good contact with a bit line contact node and well avoids a capacitor contact region. The optical proximity effect correction difficulty in the bit line forming process is reduced, the forming difficulty is reduced, and meanwhile the parasitic resistance in the bit line is effectively reduced. Reduction of the size of a memory is facilitated,and good functionality of the memory is ensured.

Description

technical field [0001] The invention relates to the technical field of semiconductor integrated circuit manufacturing, in particular to a semiconductor structure and a preparation method thereof. Background technique [0002] A dynamic random access memory (DRAM) cell includes a capacitor and an access transistor for storing charge. Usually, in order to bypass the capacitor contact node, the bit line is often formed into a curved or wavy structure, such as figure 1 The curved structure shown. [0003] However, as the size of semiconductor devices continues to shrink, the curved bit lines require complex optical proximity effect correction during exposure and development, making it very difficult to manufacture. In addition, there is a relatively large parasitic resistance in the wire of the bent or wavy bit line, which is not conducive to reducing the size of the device. Contents of the invention [0004] In view of this, the present invention provides a semiconductor s...

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Problems solved by technology

[0003] However, as the size of semiconductor devices continues to shrink, curved bit lines require complex optical proximity effect correction during exposure and development, making it very difficult to manufacture

In addition, there is a relatively large parasitic resistance in the wire of the curved or wavy bit line, which is not conducive to the reduction of the device size

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