Trench gate mosfet power semiconductor device and its polysilicon filling method and manufacturing method

Abstract

The application discloses a trench gate MOSFET power semiconductor device, a polysilicon filling method and a manufacturing method thereof. The filling method includes: forming a trench in an epitaxial layer on a semiconductor substrate; forming an insulating layer on the surface of the epitaxial layer and in the trench, and forming a cavity around the trench by the insulating layer; forming a cavity on the surface of the epitaxial layer and forming an i-th polysilicon layer in the cavity; performing etching back on the i-th polysilicon layer; widening the opening width of the cavity; forming the i+1th polysilicon layer; removing the i+1th polysilicon layer above the surface of the epitaxial layer and the insulating layer above the surface of the epitaxial layer. The present application eliminates voids or gaps by continuing to form the (i+1)th polysilicon layer after engraving the width of the opening of the cavity, thereby improving the yield, reliability and prolonging the life of the power semiconductor device.

Description

technical field [0001] The invention relates to the technical field of manufacturing power semiconductor devices, in particular to a trench gate MOSFET power semiconductor device with high withstand voltage and a polysilicon filling method and manufacturing method thereof. Background technique [0002] A schematic structural diagram of a power semiconductor device in the prior art is shown in figure 1 shown. As an example, the power semiconductor device is a trench gate MOSFET power semiconductor device. [0003] Such as figure 1 As shown, a trench gate MOSFET power semiconductor device 100 includes a plurality of trenches 120 in an epitaxial layer 102 on a semiconductor substrate 101 . [0004] Figures 2a to 2h show respectively figure 1 Cross-sectional views at different stages of the fabrication method of the illustrated power semiconductor device. [0005] Such as Figure 2a As shown, a trench 120 with a depth h1 is formed in the epitaxial layer 102 on the semico...

AI Technical Summary

Problems solved by technology

For the trench after depositing the oxide layer, the opening width of the cavity is smaller than the cavity width. In the subsequent shielding conductor deposition and filling process, due to the CVD Shape retention, when the shielding conductor 122 is further filled, even if the inside of the cavity is not filled, the shielding conductor 122 will close the opening of the cavity, so that defects such as voids or gaps 153 appear in the shielding conductor 122, which eventually leads to Leakage and withstand voltage decrease in power semiconductor device 100, and reliability deteriorates

[0017] Void or gap defects in shielding conductors lead to failures such as breakdown or short circuit of power semiconductor devices, which adversely affects the yield, reliability and life of power semiconductor devices

Images