Terahertz two-stage cascade balanced type nonuple frequency multiplier circuit

A technology of terahertz frequency multiplication and frequency multiplication circuit, which is applied in the field of terahertz chips and can solve problems such as low harmonic power and poor frequency multiplication efficiency

Active Publication Date: 2020-07-07
SOUTHEAST UNIV +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Due to the limitation of the input frequency, this frequency multiplication circuit is only suitable for the low frequency of

Method used

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  • Terahertz two-stage cascade balanced type nonuple frequency multiplier circuit
  • Terahertz two-stage cascade balanced type nonuple frequency multiplier circuit

Examples

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[0026] The present invention will be further described below in conjunction with the drawings and specific embodiments.

[0027] Such as figure 1 As shown, the input fundamental wave signal is fed from the input waveguide, and first passes through the waveguide-to-suspension line probe, which converts the input signal from the waveguide to the frequency doubling chip. Then the input signal passes through the first-stage low-pass filter. The cut-off frequency of the first-stage low-pass filter is located between the fundamental frequency and the third harmonic frequency of the input signal, which can block the reflection of the third harmonic generated by the subsequent circuit. Make it impossible to leak to the input. Immediately after the fundamental wave signal passes through the first-stage frequency multiplier circuit, the frequency multiplier circuit is composed of a pair of balanced diodes. Because the frequency multiplier diode is nonlinear and adopts an anti-parallel stru...

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Abstract

The invention discloses a terahertz two-stage cascade balanced type nonuple frequency multiplier circuit, which relates to the technical field of terahertz circuits. The terahertz two-stage cascade balanced type nonuple frequency multiplier circuit comprises an input waveguide, a cavity, a nonuple frequency multiplication circuit chip and an output waveguide, wherein a terahertz diode in the circuit is manufactured by adopting a GaAs process. The terahertz two-stage cascade balanced type nonuple frequency multiplier circuit comprises a two-stage terahertz balanced diode frequency tripler, andcan realize a nonuple frequency multiplication function. Only one diode is arranged on the single side of each stage of frequency tripler circuit, so that the cut-off frequency of each stage of frequency doubling tube is improved, and higher output frequency doubling loss can be obtained. Each stage of frequency tripler circuit adopts an odd harmonic balance type structure, so that the terahertz two-stage cascade balanced type nonuple frequency multiplier circuit has good symmetry, even-order harmonics can be better inhibited, the power on the diode is reduced, the heat dissipation of the diode is facilitated, and direct current bias can be more conveniently introduced.

Description

technical field [0001] The invention relates to an integrated circuit architecture of a terahertz frequency multiplier, belonging to the technical field of terahertz chips. It specifically relates to a terahertz two-stage cascaded balanced nine frequency multiplier circuit, which is an ultra-high frequency frequency multiplier, which adopts GaAs technology and has great advantages in terahertz circuits, with simple design structure and high output frequency. At the same time, it has the advantage of suppressing even harmonics. Background technique [0002] Terahertz wave is located between microwave and infrared radiation in the electromagnetic spectrum. It is the last frequency band that has not been fully recognized and utilized by human beings. And it has broad application prospect and strategic basic research value. [0003] The principle of frequency multiplication is that when the nonlinear device is excited by the fundamental sinusoidal signal, an output signal will...

Claims

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Application Information

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IPC IPC(8): H03B19/14
CPCH03B19/14
Inventor 李芹孙逊唐旭升黄风义张萌
Owner SOUTHEAST UNIV
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