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Method for manufacturing memory element

A technology for storage elements and manufacturing methods, which can be used in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., and can solve problems such as critical dimension reduction

Pending Publication Date: 2020-10-27
WINBOND ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, under this trend, the critical dimension of DRAM is also gradually shrinking, which leads to many challenges in the process of DRAM

Method used

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  • Method for manufacturing memory element
  • Method for manufacturing memory element
  • Method for manufacturing memory element

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Embodiment Construction

[0011] The present invention will be described more fully with reference to the accompanying drawings of this embodiment. However, the present invention can also be embodied in various forms and should not be limited to the embodiments described herein. In the drawings, the thicknesses of layers and regions may be exaggerated for clarity. The same or similar symbols represent the same or similar elements, and the following paragraphs will not repeat them one by one.

[0012] figure 1 is a schematic top view of a storage element according to an embodiment of the present invention. The storage elements described in the following embodiments are described by taking a dynamic random access memory (DRAM) as an example, but the invention is not limited thereto.

[0013] Please refer to figure 1 , the present embodiment provides a storage device comprising: a substrate 100, a plurality of isolation structures 101, a plurality of active regions AA, a plurality of bit line structur...

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Abstract

The invention provides a method for manufacturing a memory element, which comprises the steps of forming a first dielectric layer on a substrate between bit line structures; forming a plurality of first trenches in the first dielectric layer; filling the first trenches with a second dielectric layer; removing part of the first dielectric layer so as to enable the top surface of the first dielectric layer to be lower than the top surface of the second dielectric layer; forming a first mask layer which covers the top surfaces of the first dielectric layer and the second dielectric layer; performing a first etching process to form a plurality of second trenches in the first dielectric layer; filling the second trenches with a third dielectric layer; removing the first dielectric layer to forma plurality of contact window openings between the second dielectric layer and the third dielectric layer; and filling the contact window openings with a conductor material.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor element, in particular to a method for manufacturing a storage element. Background technique [0002] DRAM is a kind of volatile memory, which is composed of a plurality of storage units. In detail, each memory cell is mainly composed of a transistor and a capacitor controlled by the transistor, and each memory cell is electrically connected to each other through a word line and a bit line. In order to improve the integration of dynamic random access memory to speed up the operation speed of components, and to meet the needs of consumers for miniaturized electronic devices, a buried word line dynamic random access memory (buried word line DRAM) has been developed in recent years. to meet the above-mentioned needs. [0003] With the advancement of technology, all kinds of electronic products are developing towards the trend of thinner, lighter and smaller. However, under this trend, ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8242H01L27/108H10B12/00
CPCH10B12/315H10B12/033H10B12/0335H10B12/482
Inventor 朴哲秀陈明堂柯顺祥
Owner WINBOND ELECTRONICS CORP