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High dynamic image sensor pixel structure and timing control method

A sensor pixel, high dynamic image technology, applied in the direction of image communication, TV, color TV components, etc., can solve the problems of FDL point capacitance limited, limited dynamic range, unable to accommodate charges, etc.

Active Publication Date: 2021-08-20
DALIAN UNIV OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] The problem with the above invention is that although the dynamic range is improved by two charge transfers, due to the limitation of pixel area and filling ratio, the FDL point capacitance is limited and cannot accommodate more charges, thus limiting the dynamic range
[0009] Limited to the pixel area, the full well capacity of the pixel clamp photodiode 1 is also limited. When the light intensity is too strong or the integration time is too long, the pixel clamp photodiode 1 is filled with charge, and the output signal OUT will be saturated.
Even if the FDL point capacitance is large enough, the correct signal voltage cannot be obtained
Therefore, improving the dynamic range is limited

Method used

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  • High dynamic image sensor pixel structure and timing control method

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Embodiment Construction

[0040] Specific implementation methods such as Figure 5 The high dynamic image sensor structure of the present invention shown, Image 6 For the corresponding photoelectric conversion curve, Figure 7 for timing control.

[0041] The image sensor pixel of the present invention includes a clamp photodiode 1 , a high-gain transfer transistor 2 , a source follower 3 , a low-gain transfer transistor 6 , a reset transistor 4 , a gate transistor 5 , and an ultra-high dynamic range control diode 7 . The clamped photodiode 1 is reverse biased, the anode is grounded, and the cathode is connected to the gate FDH point of the source follower 3 through the high-gain transfer transistor 2 . A low gain pass transistor 6 connects the FDH point to the FDL point. Reset transistor 4 connects FDL to V PIX connected. The gate transistors 5 in the row control the source follower 3 to output the final signal voltage. The cathode of the ultra-high dynamic range control diode 7 is connected to...

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Abstract

The invention provides a high dynamic image sensor pixel structure and a timing control method, belonging to the field of semiconductor photoelectric direction image sensors. The high dynamic image sensor pixel structure integrates a clamped photodiode as a photodetection element, reverse biased, the anode is p-type grounded, and the cathode is connected to the input terminal FDH of the source follower through a high-gain transfer transistor. The FDH point is also connected to the low-gain pass transistor and to the FDL point. The FDL point is connected to the reset transistor and the ultra-high dynamic range control diode respectively, and the reset transistor is connected to the drain of the low-gain pass transistor to ensure that the FDL point is reset to V PIX Voltage. The gate transistor is connected with the source of the source follower, and is used for connecting the source follower with an external signal readout chain. The cathode of the ultra-high dynamic range control diode is connected to the FDL point, and the anode is connected to the voltage V C superior.

Description

technical field [0001] The invention belongs to the field of semiconductor photoelectric direction image sensors, in particular to a high dynamic range image sensor pixel with composite photoelectric response, and a timing control method corresponding thereto. Background technique [0002] The current typical CMOS image sensor adopts 4T pixel structure, such as figure 1 shown. A clamped photodiode 1 is integrated as a photodetection element, reverse biased, the anode is p-type grounded, and the cathode is connected to the input FD of the source follower 3 through a high-gain transfer transistor 2 . The FD point is also connected to the reset transistor 4 through which the V PIX Voltage reset. When working, first the high-gain transfer transistor 2 is turned off, and the clamp photodiode 1 accumulates charges under the external light; then the FD point is reset to V by the reset transistor 4 PIX , the source follower 3 performs the first read signal operation; finally, th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04N5/355
CPCH04N25/57H04N25/58
Inventor 常玉春娄珊珊吴妍岩冯国林张震刘岩
Owner DALIAN UNIV OF TECH