Check patentability & draft patents in minutes with Patsnap Eureka AI!

Efuse memory cell, memory and writing and reading methods thereof

A storage unit and memory technology, which is applied in efuse storage unit, memory and its writing and reading fields, can solve problems such as restricting the promotion of efuse storage unit, and achieve the effects of reducing voltage, reducing power consumption, and reducing volume

Inactive Publication Date: 2020-11-06
SEMICON MFG INT (SHANGHAI) CORP +1
View PDF7 Cites 1 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Due to the existence of NMOS, the area of ​​the efuse storage unit is increased, making the efuse storage unit larger, which limits the promotion of the efuse storage unit

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Efuse memory cell, memory and writing and reading methods thereof
  • Efuse memory cell, memory and writing and reading methods thereof
  • Efuse memory cell, memory and writing and reading methods thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0022] As mentioned in the background art, the current traditional efuse module requires higher voltage and current to complete efuse programming, which increases the area of ​​efuse, which is not conducive to the promotion of efuse.

[0023] figure 1 A schematic diagram of an efuse storage unit in the prior art is shown. Such as figure 1 As shown, the efuse memory cell 100 includes an electric fuse 101 and an NMOS transistor 102 . The magnitude control of the fusing current of the efuse is mainly realized by the NMOS transistor 102 connected in series with the electric fuse 101 .

[0024] Since a relatively high voltage is used to control the fusing current of the efuse, the prior art solutions usually use a high threshold voltage transistor (High threshold voltage transistor, HVT for short). Since the HVT is larger than the core device, the size of the efuse memory is increased.

[0025] figure 2 A schematic diagram of an existing efuse memory is shown. The efuse memo...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

An efuse memory cell, a memory and writing and reading methods thereof, the efuse memory cell having a write bit line end, a read bit line end, a read word line end and a write word line end, the efuse memory cell comprising: an electric fuse having a first end and a second end, the first end of the electric fuse being connected to the write bit line end; the first control tube is provided with afirst end, a second end and a control end, the first end of the first control tube is connected with the second end of the electric fuse, the second end of the first control tube is connected with theread bit line end, and the control end of the first control tube is connected with the read word line end; the second control tube is provided with a first end, a second end and a control end, the first end of the second control tube is connected with the second end of the electric fuse, the second end of the second control tube is a grounding end, and the control end of the second control tube is connected with the writing line end. The read-write operation can be separated, and the voltage of the read operation is reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to an efuse storage unit, a memory and a writing and reading method thereof. Background technique [0002] In the field of semiconductor technology, the electrically programmable fuse (efuse) technology is used as a one-time programmable memory due to its compatibility with complementary metal-oxide semiconductor (Complementary Metal-Oxide-Semiconductor transistor, CMOS) logic devices and ease of use. It is widely used in many circuits. [0003] According to the electromigration theory, efuse technology stores information by whether the electric fuse is blown by the current. The resistance of the polysilicon electric fuse is very small before it is blown, and the resistance can be regarded as infinite after continuous high current blown, and the electric fuse is broken status will be maintained permanently. Efuse technology has been widely used in redundant circuits to impr...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G11C7/12G11C7/18G11C8/08G11C8/14
CPCG11C7/12G11C7/18G11C8/08G11C8/14G11C17/16G11C17/18G11C11/4091G11C11/4094G11C11/4074G11C11/4085
Inventor 杨家奇
Owner SEMICON MFG INT (SHANGHAI) CORP
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com