Electrical characteristic modeling method and system of FET device and storage medium

Abstract

The invention discloses an electrical characteristic modeling method and system of an FET (Field Effect Transistor) device and a storage medium, which are applied to a semiconductor simulation technology, and the method comprises the following steps: acquiring fixed parameters of the FET device; obtaining a target electrical index parameter of the FET device; configuring and initializing a variable parameter of the FET device; constructing a physical model according to the fixed parameters and the variable parameters of the FET device; selecting a simulation physical model to perform electrical performance simulation on the physical model to obtain simulation electrical index parameters; modifying the numerical value of the variable parameter according to the target electrical index parameter and the simulated electrical index parameter until the absolute value of the difference between the simulated electrical index parameter of the physical model corresponding to the modified variable parameter and the target electrical index parameter meets a preset condition; and obtaining an electrical characteristic model of the FET device according to an electrical performance simulation result of a physical model formed by the modified variable parameters and the fixed parameters. According to the invention, the modeling efficiency can be improved.

Description

technical field [0001] The invention relates to semiconductor simulation technology, in particular to a modeling method, system and storage medium for electrical characteristics of FET devices. Background technique [0002] In order to continuously realize Moore's Law and achieve higher transistor performance and circuit density, advanced CMOS technology has focused on scaling device geometries for decades. In order to solve the short-channel effect problem of traditional planar transistors at 20nm, the traditional planar semiconductor field-effect transistor architecture is transformed into a FinFET (Fin Field-Effect Transistor, Chinese name is Fin Field-Effect Transistor) architecture. The fin field effect transistor has excellent gate control ability and good compatibility with the CMOS process, and has become the most commonly used core device in the deep nanoscale process size. [0003] However, when researching devices in the past, the electrical characteristic model ...

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Problems solved by technology

[0003] However, in the past, when researching devices, the electrical characteristic model of the device was established by measuring the device after fabrication, which is relatively inefficient.

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