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Embedded system distributed scheduling system

A technology of embedded systems and scheduling systems, applied in the directions of resource allocation, multi-programming devices, instruments, etc., can solve the problem of high probability of failure, achieve high concurrency and high-performance processing, improve availability and reliability, improve The effect of throughput

Active Publication Date: 2020-12-11
UNIV OF SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] 2. Common node failure: For a single embedded device, the probability of a single node failure is relatively low, but when the number of nodes reaches a certain scale, the probability of failure becomes higher

Method used

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  • Embedded system distributed scheduling system
  • Embedded system distributed scheduling system
  • Embedded system distributed scheduling system

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Embodiment

[0056] The invention discloses a distributed scheduling system for an embedded system. The distributed scheduling system is set in a distributed embedded system. The distributed embedded system includes a server and at least one client, so that the distributed embedded device can Software system development is more convenient, mainly including business-side multi-module and multi-thread cooperation to achieve high concurrency, high performance and high scalability; at the same time, an exception handling module is added to automatically detect status and exception information, and automatically handle and recover from exceptions , which can improve the availability and reliability of the system; finally, develop the corresponding upper computer and define a transmission protocol to obtain the status information and abnormal conditions of each embedded device in real time.

[0057] The overall frame of the present invention is based on the C / S model, and is divided into a cl...

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Abstract

The invention discloses an embedded system distributed scheduling system. The distributed scheduling system is arranged in a distributed embedded system, the distributed embedded system comprises a server side and at least one client side, and the server side and the client side communicate through a socket; the server side of the distributed scheduling system comprises a server side task management module, a server side exception management module and a basic service module, and the client side of the distributed scheduling system comprises a client side task processing module, a client sideexception management module and a network service module. Business end development can be carried out on the basis of the distributed system, and all heterogeneous embedded systems are utilized to cooperate together to complete a computing task. The abnormal module is used for detecting the state information and abnormal conditions of each node, processing the abnormal conditions and automaticallyrecovering the abnormal conditions, an upper computer is developed, and a set of protocol and mechanism are designed to transmit the state information for visual display.

Description

technical field [0001] The invention belongs to the technical field of embedded systems, and in particular relates to a distributed scheduling system for embedded systems. Background technique [0002] The embedded system is to combine the system circuit of the microprocessor or microcontroller with its specific software to achieve the highest ratio of system operating performance to cost. For example, the current mobile phones, TVs, refrigerators, etc. are all embedded systems, but the original embedded The traditional system is only responsible for a single calculation, but as the system becomes more and more complex, multiple embedded systems need to run together, so a distributed embedded system is produced. [0003] like figure 1 It is a distributed embedded system platform architecture diagram. The hardware platform includes the above-mentioned FPGA, the main FPGA and four 1H8 hardware development platforms (hereinafter referred to as 1H8). Among them, the main FPGA ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/50G06F9/54G06F11/07G06F11/30G06F11/32
CPCG06F9/5027G06F9/544G06F11/0715G06F11/0793G06F11/3017G06F11/327G06F11/3055G06F2209/5018G06F2209/541G06F2209/508Y02P90/30
Inventor 朱宗卫章博苑福利席兴宇王延龄朱骁睿凌康志周学海
Owner UNIV OF SCI & TECH OF CHINA