Passive wireless communication chip verification platform, construction method and chip verification method

A communication chip, passive wireless technology, applied in functional testing, instruments, electrical digital data processing, etc., can solve problems such as increasing the complexity of the environment, and achieve the effects of improving verification quality and verification efficiency, high writing efficiency, and improving efficiency

Active Publication Date: 2020-12-18
BEIJING SMARTCHIP MICROELECTRONICS TECH COMPANY +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Such processing will increase the complexity of the environment

Method used

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  • Passive wireless communication chip verification platform, construction method and chip verification method
  • Passive wireless communication chip verification platform, construction method and chip verification method
  • Passive wireless communication chip verification platform, construction method and chip verification method

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Embodiment Construction

[0080] Specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. It should be understood that the specific embodiments described here are only used to illustrate and explain the present invention, and are not intended to limit the present invention.

[0081] figure 1 It is a structural block diagram of a UVM-based passive wireless communication chip verification platform provided by an embodiment of the present invention. Such as figure 1 As shown, the verification platform includes:

[0082] A sequence unit (sequence), used to provide a three-layer verification sequence for passive wireless communication chip verification;

[0083] Verify the top-level unit, which is used to establish the signal connection between the test interface (interface) and the passive wireless communication chip (DUT) under test, and call the run_test function to start the simulation verification;

[0084] The environment layer ...

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Abstract

The invention provides a passive wireless communication chip verification platform, a construction method and a chip verification method. The passive wireless communication chip verification platformcomprises a sequence unit used for providing a three-layer verification sequence for passive wireless communication chip verification; a verification top layer unit used for establishing signal connection between the test interface and the tested passive wireless communication chip and starting simulation verification; an environment layer unit used for sending a target verification sequence to the tested passive wireless communication chip after starting simulation verification and carrying out response result comparison scoring to obtain a verification result; and a test interface used for being connected with the tested passive wireless communication chip. The verification platform is simple in structure and high in operation efficiency, the verification quality and the verification efficiency of the passive wireless communication chip can be effectively improved, three layers of verification sequences provided by the sequence unit can be combined and called according to different verified chips and different environments, a state entering part does not need to be repeatedly compiled, and the verification sequence compiling efficiency is improved.

Description

technical field [0001] The present invention relates to the field of chip verification testing, in particular to a UVM-based passive wireless communication chip verification platform, a UVM-based passive wireless communication chip verification platform construction method, and a UVM-based passive wireless communication chip verification The method by which the platform authenticates the chip. Background technique [0002] With the advancement of society and the development of chip technology, passive wireless communication chips have more and more applications in many fields such as industrial Internet, item tracking, and information collection. Passive wireless communication chips usually have the characteristics of multiple commands, multiple states, and large memory capacity. These characteristics lead to diverse scenarios for verification of such chips and increase the complexity of verification. Simulation verification plays an important role in the entire chip front-...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/26G06F11/34
CPCG06F11/26G06F11/3457
Inventor 李萌李德建苏萌郝燚冯文楠唐晓柯
Owner BEIJING SMARTCHIP MICROELECTRONICS TECH COMPANY
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