Semiconductor structure forming method and transistor

Abstract

The invention relates to a semiconductor structure forming method and a transistor. The forming method comprises the steps of providing a substrate, wherein the substrate is provided with one or morestacked core material layers; carrying out self-alignment graphical processing on each core material layer to form a substrate mask layer used for etching the substrate, wherein the self-alignment graphical processing comprises the steps of etching the core material layer to form an initial core layer; annealing the initial core layer by adopting one or more of hydrogen and isotope gas of hydrogento form a core layer; forming a side wall layer on the side wall of the core layer as an etching mask of the next core material layer or as a substrate mask layer; and etching the substrate by takingthe substrate mask layer as a mask to form a target pattern. In the process of self-alignment patterning processing, the pattern transfer precision is high, so that the surface roughness of the sidewall of the subsequently formed substrate mask layer is relatively low, the surface roughness of the side wall of the subsequently formed target pattern is relatively low, and the electrical performance of the semiconductor structure is improved.

Description

technical field [0001] Embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular, to a method for forming a semiconductor structure and a transistor. Background technique [0002] In semiconductor manufacturing, with the development trend of ultra-large-scale integrated circuits, the feature size of integrated circuits continues to decrease. In order to adapt to smaller feature sizes, metal-oxide-semiconductor field-effect transistors (Metal-Oxide-Semiconductor Field-Effect Transistor , MOSFET) channel length has been shortened accordingly. However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so the ability of the gate structure to control the channel becomes worse, and the gate voltage pinches off the channel. The channel becomes more and more difficult, making subthreshold leakage (subthreshold leakage), the so-called short-channel effect (...

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Problems solved by technology

However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so the ability of the gate structure to control the channel becomes worse, and the gate voltage pinches off the channel. The difficulty of the channel is also increasing, making the phenomenon of subthreshold leakage (subthreshold leakage), the so-called short-channel effect (short-channel effects, SCE) more prone to occur

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