Method for generating code pattern for signal integrity analysis

A technology of signal integrity and generation method, which is applied in the electronic field, can solve the problems of low efficiency of transistor-level models and low precision of IBIS models, and achieve the effect of enhanced feasibility and improved design efficiency

Pending Publication Date: 2021-02-05
南京蓝洋智能科技有限公司
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Problems solved by technology

[0005] In order to solve the problem of low accuracy of the above-mentioned IBIS model and low efficiency of the t...

Method used

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  • Method for generating code pattern for signal integrity analysis
  • Method for generating code pattern for signal integrity analysis
  • Method for generating code pattern for signal integrity analysis

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Embodiment Construction

[0020] Embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0021] refer to figure 1 With Fig. 2, the detailed implementation steps of the present invention are as follows:

[0022] Step 1, for each attacked signal, obtain the crosstalk ranking of its attacking signals.

[0023] First read the S-parameter model of the high-speed interface link, and for each signal, read the crosstalk of other signals to it and sort it according to the magnitude. The amplitude here can be selected from a single frequency point (usually the Nyquist frequency of the high-speed interface), or the root mean square of the crosstalk amplitude at multiple frequency points near the Nyquist frequency. The resonance problem of the single frequency point method will cause errors.

[0024] The S-parameter here must be the S-parameter of the whole link, which can be obtained by cascading the S-parameters of each module such as the package...

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Abstract

The invention discloses a method for generating a code pattern for signal integrity analysis, which comprises the following steps of reading a signal full-link S parameter model, determining a crosstalk sequence of bits in each high-speed interface, and determining an attacked person corresponding to each signal line according to the maximum number of attacked persons of a victim signal, generating a PRBS seed code pattern to enable the PRBS seed code pattern to contain the worst inter-code interference effect, and rewriting the PRBS seed code pattern into a code pattern a, taking the code pattern a as a seed code pattern, and generating a code pattern b containing crosstalk of each signal, and reading the S parameter model or the PDN impedance resonant frequency of the PDN link, and carrying out post-processing on the code pattern b to generate a code pattern c comprising worst power supply noise. According to the method, the worst result of the PRBS code pattern theory can be simulated, the signal quality of the full link of the high-speed interface can also be accurately simulated, the defects that power supply noise cannot be considered and the precision problem exists in a traditional method are overcome, the acceptance design basis of the full link of the high-speed interface is more reliable, over-design or under-design is avoided, and the design cost is saved.

Description

technical field [0001] The invention discloses a method for generating code patterns used for signal integrity analysis, relates to high-speed interface circuit transistor-level simulation analysis code patterns, and belongs to the field of electronic technology. Background technique [0002] Signal integrity (Signal Integrity, SI) is a task of simulating and analyzing the entire link of a high-speed interface to evaluate whether the signal quality meets the design requirements. Usually, it is necessary to comprehensively consider effects such as power supply noise, signal link crosstalk, reflection, and loss. Finally, the width and height of the superimposed eye diagram are used as the basis for judgment. [0003] High-speed interface full-link SI simulation can be performed based on IO behavior-level IBIS models or transistor-level SPICE netlists. The IBIS model has the advantages of fast speed and hiding the internal details of the design, etc., but the IBIS model cannot...

Claims

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Application Information

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IPC IPC(8): G06F30/367
CPCG06F30/367
Inventor 邓俊勇李力游蔡宗宇小约翰·罗伯特·罗兰陈希恒韦红芳
Owner 南京蓝洋智能科技有限公司
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