Hardware accelerator, data processing method, system-on-chip and medium

Abstract

The invention discloses a hardware accelerator, a data processing method, a system-on-chip and a medium. An instruction set processed by the hardware accelerator comprises a data flow control instruction used for executing data flow control; a conventional type calculation instruction used for executing conventional type calculation so as to complete conventional type calculation in a recurrent neural network; a special type calculation instruction used for executing special type calculation so as to complete the special type calculation in the recurrent neural network; an exponential shift instruction used for executing exponential shift so as to complete data normalization in the recurrent neural network calculation; a data transfer instruction used for executing data transfer so as to complete data transfer operation between different registers and data transfer operation between the registers and a memory during calculation of the recurrent neural network. According to the technical scheme, the calculation resource utilization rate of the hardware accelerator used for operating the recurrent neural network can be effectively improved, and conflicts in the aspects of data and resources can be effectively avoided.

Description

technical field [0001] The invention relates to the technical field of artificial intelligence, in particular to a hardware accelerator, a data processing method, a system-level chip and a medium. Background technique [0002] At present, hardware accelerators for neural networks include Google's TPU, NVDIA's NVDLA, Cambrian and so on. The mainstream neural network hardware accelerator has done a lot of calculation optimization for CNN (ie Convolutional Neural Networks, convolutional neural network) network and RNN (ie Recurrent Neural Network, cyclic neural network) neural network, and in the process of hardware calculation for volume The convolution operation of the product and the convolution kernel of different sizes has been optimized. [0003] In the prior art, there are no relevant methods and technologies specifically for recurrent neural networks that require high throughput and real-time reasoning. Moreover, the existing technologies mainly focus on the methods a...

AI Technical Summary

Problems solved by technology

[0004] 1. Due to the need to take into account more CNN and other computing applications, the utilization rate of computing resources is not high;

[0005] 2. There are a lot of splicing data in the existing technical process, but the splicing of data does not need to be considered in the method and process optimized for RNN alone;

[0006] 3. There is a dependency relationship between the data of the preceding and following instructions. There is a special module to judge the data dependency relationship to determine whether the pipeline is to stop or run. The method and process cannot achieve a high utilization rate of computing resources;

[0007] 4. Some existing methods and architectures need to balance resources and recycle hardware resources through software scheduling. Without planning instructions, data conflicts often occur (the required data has not been calculated yet, and instructions are arranged reasonably) and Resource conflict (each instruction has a complete set of computing resources, which are distributed throughout the pipeline), and the operation efficiency is low

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